[v4,1/3] dt-bindings: reset: add schema for imx8ulp SIM reset

Commit Message

Laurentiu Mihalcea Sept. 15, 2024, 11:43 a.m. UTC

Add schema for imx8ulp's SIM reset controller.

Signed-off-by: Liu Ying <[e-mail]>
Signed-off-by: Laurentiu Mihalcea <[e-mail]>
---
 .../reset/nxp,imx8ulp-avd-sim-reset.yaml      | 58 +++++++++++++++++++
 1 file changed, 58 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/reset/nxp,imx8ulp-avd-sim-reset.yaml

Comments

Krzysztof Kozlowski Sept. 16, 2024, 9:41 a.m. UTC | #1

On Sun, Sep 15, 2024 at 07:43:09AM -0400, Laurentiu Mihalcea wrote:
> Add schema for imx8ulp's SIM reset controller.
> 
> Signed-off-by: Liu Ying <[e-mail]>
> Signed-off-by: Laurentiu Mihalcea <[e-mail]>

Fix checkpatch errors. You have SoB mismatch.

This applies to all your patches.

Best regards,
Krzysztof

Patch

diff --git a/Documentation/devicetree/bindings/reset/nxp,imx8ulp-avd-sim-reset.yaml b/Documentation/devicetree/bindings/reset/nxp,imx8ulp-avd-sim-reset.yaml
new file mode 100644
index 000000000000..f6797966fd35
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/nxp,imx8ulp-avd-sim-reset.yaml
@@ -0,0 +1,58 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/reset/nxp,imx8ulp-avd-sim-reset.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP i.MX8ULP System Integration Module Reset Controller
+
+maintainers:
+  - Liu Ying <[e-mail]>
+
+description:
+  Some instances of i.MX8ULP's SIM may offer control over the reset of some
+  components of a certain domain (example - AVD-SIM).
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - nxp,imx8ulp-avd-sim-reset
+      - const: syscon
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  '#reset-cells':
+    const: 1
+
+  mux-controller:
+    $ref: /schemas/mux/reg-mux.yaml#
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - '#reset-cells'
+  - mux-controller
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/imx8ulp-clock.h>
+    syscon@2da50000 {
+      compatible = "nxp,imx8ulp-avd-sim-reset", "syscon";
+      reg = <0x2da50000 0x38>;
+      clocks = <&pcc5 IMX8ULP_CLK_AVD_SIM>;
+      #reset-cells = <1>;
+
+      mux-controller {
+        compatible = "mmio-mux";
+        #mux-control-cells = <1>;
+        mux-reg-masks = <0x8 0x00000200>;
+      };
+    };