| Message ID | 20240924071218.3578402-1-victor.liu@nxp.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | arm64: dts: imx8mp-skov-revb-mi1010ait-1cp1: Assign "media_isp" clock rate | expand |
On Tue, Sep 24, 2024 at 03:12:18PM +0800, Liu Ying wrote: > Commit 2d39b78e5716 ("arm64: dts: imx8mp: Add DT nodes for the two ISPs") > added a new phandle to the "assigned-clocks" property of media_blk_ctrl > node just before the phandle for "video_pll1" clock in i.MX8MP SoC device > tree so that "media_isp" clock rate is assigned to 500MHz by default. > However, it missed updating this relevant board device tree where the > relevant "assigned-clock-rates" property is changed to set a new rate > for "video_pll1" clock. This causes the "media_isp" clock rate being > wrongly set to the "video_pll1" clock rate and the "video_pll1" clock > rate being untouched. Fix this by assigning "media_isp" clock rate > explicitly to 500MHz in this board device tree. > > Fixes: 2d39b78e5716 ("arm64: dts: imx8mp: Add DT nodes for the two ISPs") > Signed-off-by: Liu Ying <victor.liu@nxp.com> Applied, thanks!
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-mi1010ait-1cp1.dts b/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-mi1010ait-1cp1.dts index 3c2efdc59bfa..30962922b361 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-mi1010ait-1cp1.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-skov-revb-mi1010ait-1cp1.dts @@ -71,6 +71,7 @@ &media_blk_ctrl { assigned-clock-rates = <500000000>, <200000000>, <0>, /* IMX8MP_CLK_MEDIA_DISP2_PIX = pixelclk of lvds panel */ <68900000>, + <500000000>, /* IMX8MP_VIDEO_PLL1 = IMX8MP_CLK_MEDIA_LDB * 2 */ <964600000>; };
Commit 2d39b78e5716 ("arm64: dts: imx8mp: Add DT nodes for the two ISPs") added a new phandle to the "assigned-clocks" property of media_blk_ctrl node just before the phandle for "video_pll1" clock in i.MX8MP SoC device tree so that "media_isp" clock rate is assigned to 500MHz by default. However, it missed updating this relevant board device tree where the relevant "assigned-clock-rates" property is changed to set a new rate for "video_pll1" clock. This causes the "media_isp" clock rate being wrongly set to the "video_pll1" clock rate and the "video_pll1" clock rate being untouched. Fix this by assigning "media_isp" clock rate explicitly to 500MHz in this board device tree. Fixes: 2d39b78e5716 ("arm64: dts: imx8mp: Add DT nodes for the two ISPs") Signed-off-by: Liu Ying <victor.liu@nxp.com> --- .../arm64/boot/dts/freescale/imx8mp-skov-revb-mi1010ait-1cp1.dts | 1 + 1 file changed, 1 insertion(+)