From patchwork Wed Nov 13 10:10:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrei Stefanescu X-Patchwork-Id: 13873405 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on2059.outbound.protection.outlook.com [40.107.21.59]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 934D11F80C2 for ; Wed, 13 Nov 2024 10:12:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.21.59 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731492760; cv=fail; b=Z8FnNPeOOqxX3u8tP8pPoxBNmWrP3pqjXiq67KNKvZQld2yWBIbSDhuvMSs5yIqjZwGLH85BCj74icb9t2t6Q/7LRVi3ih+C4fOBFdZ//BjgK2ZE/fdIYygD7tdMp+xIh1SDaVPysshe/ecxWlRJpoOMFj3reaQNxac1w3uLLuU= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731492760; c=relaxed/simple; bh=FRPrjdr+xuu/myXoZJW8WBf0xGo4kJxUmsFFubcL25E=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=QVYrEj7m+6JWEJ8yYlKh7giFJqsMyReg6Ap5pUvnYjvfcl1s8SoACVN2nxdguunL48yQMhtfoRJQS5H+etGIYN+wLaHnYMyoTomVS5jb90sJebHo2XMyMD+30GYIlIBw0WHfm8wOahDrK4nSV/mktChcjCgKLrV4i+V8/hDjF/o= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=oss.nxp.com; spf=pass smtp.mailfrom=oss.nxp.com; dkim=pass (2048-bit key) header.d=NXP1.onmicrosoft.com header.i=@NXP1.onmicrosoft.com header.b=OHXGO76f; arc=fail smtp.client-ip=40.107.21.59 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=oss.nxp.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.nxp.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=NXP1.onmicrosoft.com header.i=@NXP1.onmicrosoft.com header.b="OHXGO76f" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=gSTHBWv12uvx2jtK377mVuhBSpBontOdL6GZiDYjXOk5Ggr2AddJrugK3ujOYgp/mX7gGvHyG3yQY9U+Z2EoTNQunijm+Xm+fR+A7SO6RBgkCHDSeot00MQgLUReI6MoRbKuJegbq2P5Xkj+yR+OWHIkCbHR/ElmTcgJB4EVgOFobjUaJhQGbwCOxeftmBhZ1HnaGEJHtumaSG+Ku692vD9qhTqpVi8MtoygHA+K5TMGbEkyzV+CggpCB6iPbjBLfwAOKBxF6FyoS2l9kM8TtoNyDR2cLj04Axs/mc8KED5r5SGM79Yv/lc/CypWG9TlabP1PWrlKU6Jy3MeNxvcSw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=2JMsIrNOcncD1mnEjvXrGMCWkZcNE+wVT8B+C65EkpU=; b=p/u6ONMpUxVTqOlPD3XIA0ga7bGeHdpcCFu+pgFplyDPTckkJccpCFg9E8Cd59jiObitml5ABb6v3pln34Sg3vTh7na59XcfZglqJ2gzn9yNWRjKcharGX+DH/81kOcjJPfH0b8hUVbBYgMICsbm4us2fRCTycMnhdL5/dc4wNRL94+epfoyxvRGJ2miE5YIFdGBOx1pipsOyBx23basDJ0oyGtLv3oLwXP4THsb9Nwk274sLzgMdQEDeTYI7uXUVxgksEIFfR5pAjB2qwGmvTqtiuQN7YtN6GAlcg+J020HHF5m+bMEOItuTYzVnbblal8qEuGxuBVPjD45bzgkxA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=oss.nxp.com; dmarc=pass action=none header.from=oss.nxp.com; dkim=pass header.d=oss.nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=NXP1.onmicrosoft.com; s=selector1-NXP1-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=2JMsIrNOcncD1mnEjvXrGMCWkZcNE+wVT8B+C65EkpU=; b=OHXGO76f1ots/rmt2qUrocFxFhqD/Uou703B5EPbFYc1H1g/z7biUqu1ZTEBAfiSVXDo/XKcfPGAGAWftNIpE8ZTBWUy6f6jWJuQyTn+Lt5crVzEu1a2nGcyhex9StVK7g9nBSWWqdThvdmQLXFIbQ+XVsvKlehIvtPeQTxyLdBwFu2RfZ0t+FdegCav1EVNfU+jgIrRAjWDhSyYo+lcVQkEErLj67yp+875nI0dx1ZyoGm9t8SmOejA4NVMTzPAO+Gq09gKY//GQ3F9Hgzzf/rp8EgHBDyISSqUeEVmudwoQ9522nBfK+1TPhKkGSL0oIvCfbPbEd9gnxsDnKg0UQ== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=oss.nxp.com; Received: from AM9PR04MB8487.eurprd04.prod.outlook.com (2603:10a6:20b:41a::6) by PA2PR04MB10129.eurprd04.prod.outlook.com (2603:10a6:102:3ff::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8137.28; Wed, 13 Nov 2024 10:12:34 +0000 Received: from AM9PR04MB8487.eurprd04.prod.outlook.com ([fe80::6d7a:8d2:f020:455]) by AM9PR04MB8487.eurprd04.prod.outlook.com ([fe80::6d7a:8d2:f020:455%4]) with mapi id 15.20.8158.013; Wed, 13 Nov 2024 10:12:34 +0000 From: Andrei Stefanescu To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chester Lin , Matthias Brugger , Ghennadi Procopciuc , Larisa Grigore , Greg Kroah-Hartman , "Rafael J. Wysocki" , Lee Jones , Shawn Guo , Sascha Hauer , Fabio Estevam , Dong Aisheng , Jacky Bai Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP S32 Linux Team , Christophe Lizzi , Alberto Ruiz , Enric Balletbo , Pengutronix Kernel Team , imx@lists.linux.dev, Andrei Stefanescu Subject: [PATCH v6 1/7] dt-bindings: mfd: add support for the NXP SIUL2 module Date: Wed, 13 Nov 2024 12:10:53 +0200 Message-ID: <20241113101124.1279648-2-andrei.stefanescu@oss.nxp.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241113101124.1279648-1-andrei.stefanescu@oss.nxp.com> References: <20241113101124.1279648-1-andrei.stefanescu@oss.nxp.com> X-ClientProxiedBy: AM8P251CA0005.EURP251.PROD.OUTLOOK.COM (2603:10a6:20b:21b::10) To AM9PR04MB8487.eurprd04.prod.outlook.com (2603:10a6:20b:41a::6) Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM9PR04MB8487:EE_|PA2PR04MB10129:EE_ X-MS-Office365-Filtering-Correlation-Id: d88f97dc-57ef-432d-2b5e-08dd03cbb0d9 X-MS-Exchange-SharedMailbox-RoutingAgent-Processed: True X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|7416014|376014|52116014|1800799024|38350700014|921020; X-Microsoft-Antispam-Message-Info: =?utf-8?q?2TnWXpon+A+7gPmiNvVBgk1zUj54vZO?= =?utf-8?q?ytY/uQKymYxkklG0/IhSY2a2f2t0P/pfUO4T86z7SewLr7to930SIgrUvYkyRkqJJ?= =?utf-8?q?T4xIOZ9+THZ+hlsbe8Djx1bXDmgaiykcd/XHhyCxT9FS0aaXvUcCfL1KY0RFJoCRI?= =?utf-8?q?g4hwyTsXjjCdWHzMFPXWwcH6vtLwpNw65tqe6DtjquPrXyjVva1YqdzrMuZkxxoax?= =?utf-8?q?/r8xgeWm1N0z3Cppq/hhNceVQFpKewr3iZrggoM8zOInAmD/hlQ2xfqSQE1FICfjX?= =?utf-8?q?noq+tWw049j1BqPTBAUAP52/nEiovl7gm5y+jIkjRYvVioh54IEF2VNsM1Eu2NBPS?= =?utf-8?q?8TqvHidC7yrnTBpNV1JcF5OjLcH5P+7diixNP0Rm9hCUWS4DOFl3Ym8GIUZm35laH?= =?utf-8?q?4w+ueeQvC0RRt2N53b+vkqAfmdADzYJa1fIakoxqU24QcXXIoXy+DiiZJ3j9ncExa?= =?utf-8?q?eRXBk4fVhmnBpA/JQjEXu2SrZDRsGSRxQsT8Z0T8UmSj0ji1c3Bn5CfPGWivOa0zh?= =?utf-8?q?DDtFSf/H1ukpn3PBF8zHDbHkQtpTZ7j1dMIYM6QgJAr1yLbvA8fpukW88UWwN1mJE?= =?utf-8?q?fe00prITgwImVlKN/S48P0yQSaZjqRUbPQ4cOnjWb/e64xpIfWxrbkqFVLp7PHIGC?= =?utf-8?q?Jojk3ywuQJcrZh2sJvFdHoPXEWlVf93i/MxQvwCUN+gi2HGe0TRQmSNUDtylKxwUH?= =?utf-8?q?6WShiKwYxEtlFPIkdSNk4FN2+jroHRdtDb5qbjKCjo9IHJFdpWZqd/NgAFGkqoT8H?= =?utf-8?q?JsRBD5f0iMlW2euvJE15Nwd1EbtsXH3/rHpCIUc07EXxOdNtmCgR4feH8CuyRbdL3?= =?utf-8?q?RfzxFLSvXZPkko3hx7y5DKSqjtUzaBbwB70MiTuGzMFPkmlS1lwHgnwdwn7ePCYQk?= =?utf-8?q?ilZ1MZuJfM9fy7kOp4ZHgdZB6tpO2/SWODXCUGK7a+Fa97xpIzelry+IqvxdRDLyQ?= =?utf-8?q?PnK8qsBi6Wkt7VJOEeyOPOAnJt6GfjnEZed+fny9yQKqq1r8IyxwmyxCIDiTtLrOs?= =?utf-8?q?BTKlkndRNQZaAy8In7glG18SSe+1gtpIRPgbGV8erFLoySCFtIKlxwDMpZT7B0x28?= =?utf-8?q?ZVpQSSk0SjrtaKhVYpiWLT8NZus4/8zvFzvuiIAQzzrnWwu7SdtHi+AGz1DSKdZmq?= =?utf-8?q?Ws1rLU6ae2Pf6CMTwLcHNqo2UZiq/kDB2Yehd96OkEVVSGzAEpnFKd8AELno/wwRg?= =?utf-8?q?YrQLFcQWrJvyKfoaVBaKuXepBxEG7B2oMkrYAYJjZ6smLTdztaxgOm7+M2XIcRvST?= =?utf-8?q?46HhJoBWdVAV/2i3t+NybMhRLs8dVPAGTNw=3D=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:AM9PR04MB8487.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(366016)(7416014)(376014)(52116014)(1800799024)(38350700014)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?zNfrcCq5YH1INUx/s1ekhE5/x921?= =?utf-8?q?2v3W9usORkLFv7uZj/7dwTwRef+WogT/zkKWeo3sl7EYLiqz3rxmNTlu9xi1kWrhy?= =?utf-8?q?+QMVODa6zCRVSh78UjTR37HtZoiCOzCi5lwx/YGWEhnt3kooS6WjZrhoIvfCncD2q?= =?utf-8?q?L8OcuASaMyfxTimUM5QBHZDckwNOWnsaNqdzMn1cHMEaNQfXUQg2QcfP66oKMXfXn?= =?utf-8?q?yRE4AI4GkyW2JGxVxeb8nefjMgr4/5DDw5TxfJq5nsAKAslK1HxVO6XewHHE8O0Oq?= =?utf-8?q?umtsitvnbXy2RIpZaOw0fRw+iKYpzTek5Xq745Mdor2MeOE57oOkf9i6nJIckbv3b?= =?utf-8?q?l2FuyvZKkyh7oP9X6xnxRerr+DxHPWv/SUFswVGrL/FRXB5O77EmfbuzO7X+zF10Z?= =?utf-8?q?WL0UJuRtRNc5mCNg6jjw/VCzI74MCkpVuXSaOesq8QyWMWgWUuEinJj5VZBwRBRib?= =?utf-8?q?EvuC/uDu2BbvMMatOF4iGGRH4XgoinH9CBVHW5RFKNGESv2yG6+x+BSZa//9NniQP?= =?utf-8?q?fQExjnKJKgex8yPTzT8WTw183INGFWCsEA6vUK/JVm6FAfqS+iLPgJ5sd/2f6bU1l?= =?utf-8?q?N/ZKtMFV1xR2pTOMWcBSsoPRRrlrrsG1t0vz2v+8t6p541T1IwnXgUYpn/el9jMcH?= =?utf-8?q?/84/hAuY6ooDq54UNfYqggQgJh93ppMfojPsPh41RCERyG0j6gdoQ2ezzBUbyBwmM?= =?utf-8?q?61zlG34kLtgsuQVNYKIXxQ659XYLi9AVOMDoDXNCD2P+4qPld+MiU9j3MEZQhogkR?= =?utf-8?q?yBsICtvIepbKHz1MhYKLIdNP8gq2/xlHULi6QSYdXITQetMec6iMMZSUzk4GphKUa?= =?utf-8?q?U/PERdd/pfzCGAk5QVgN616SKt7Ba+uViFKuq1tWYkwwJkUva1j2ib2yzrBm9myhQ?= =?utf-8?q?xtLV2bkQpcMDo9IEknkTIYw10VM09s3fnWDGmyB2vcsmnrpN8j2pEFLudZKScQXlJ?= =?utf-8?q?i/P0QWFxBtptRUGLeqdnr/sGfuPXJdJPEied3TiIibSorNydaDmHyAhqkI58n0YUK?= =?utf-8?q?S+RWRm11fLMX9GTdG00cSjt3WydrTXyxCOze9IzNv4p8wWGRA+pGKIr3+7hnpLw7B?= =?utf-8?q?26qycbc1UX5uL43u5brQwjaZLCgX0FNX+sjt1JH7rJidEFch69zOtidEfNAV/u6QH?= =?utf-8?q?FZjFJBQp+mldVCYvYimCjpUr/+woEGSAsqrevxNydnezWQnsPfzDJ8jBQ9yileEb2?= =?utf-8?q?g3MxPc7QgajyXU0jZM3aXeTsZ2OnKjwITYR6lXc7VjZRfyfP4BoZfKh24t8oLeNcP?= =?utf-8?q?m9PFVYy8o+/1mxuQsDod3Fp6lVMVdJtg6YF08OloetolGZzqN1pFUu6Do/b4R1LMn?= =?utf-8?q?VSEYxH1VVs+NR6MPCcinSFX0K/jxze1O41a71ZK3XNTg0vGe9SM8Id9Kw83ntGkiV?= =?utf-8?q?RgzqHCu75ophhYi0lkmyUx521pDPJiTjd64xI5Hb1G/bYKbxOKkmEr9kfPosW3ax5?= =?utf-8?q?lCo/3Xy/i6ZaR7UTnXcexIeu72wj1KxYiy58fT6K8vPUGI+5ytlLuyRgsB+7pajGV?= =?utf-8?q?JnS6Gv6rM6xee3qUwuOeEBfnn86+1oMp2g=3D=3D?= X-OriginatorOrg: oss.nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: d88f97dc-57ef-432d-2b5e-08dd03cbb0d9 X-MS-Exchange-CrossTenant-AuthSource: AM9PR04MB8487.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Nov 2024 10:12:34.0488 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: jfbJhVdVpySr2Bb8JPaJpnpLiHT6ihksQpO8ziY5yAZb8OW/JsEtKN7hCbicmJ5/XYYna7tSEdVhVePEnFhLggid1mx/HJLzVZIywNWWeWs= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PA2PR04MB10129 Add the dt-bindings for the NXP SIUL2 module which is a multi function device. It can export information about the SoC, configure the pinmux&pinconf for pins and it is also a GPIO controller with interrupt capability. Signed-off-by: Andrei Stefanescu --- .../bindings/mfd/nxp,s32g2-siul2.yaml | 165 ++++++++++++++++++ 1 file changed, 165 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/nxp,s32g2-siul2.yaml diff --git a/Documentation/devicetree/bindings/mfd/nxp,s32g2-siul2.yaml b/Documentation/devicetree/bindings/mfd/nxp,s32g2-siul2.yaml new file mode 100644 index 000000000000..a8edbea75bb6 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/nxp,s32g2-siul2.yaml @@ -0,0 +1,165 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2024 NXP +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/nxp,s32g2-siul2.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP S32 System Integration Unit Lite2 (SIUL2) + +maintainers: + - Andrei Stefanescu + +description: | + SIUL2 is a hardware block which implements pinmuxing, + pinconf, GPIOs (some with interrupt capability) and + registers which contain information about the SoC. + There are generally two SIUL2 modules whose functionality + is grouped together. For example interrupt configuration + registers are part of SIUL2_1 even though interrupts are + also available for SIUL2_0 pins. + + The following register types are exported by SIUL2: + - MIDR (MCU ID Register) - information related to the SoC + - interrupt configuration registers + - MSCR (Multiplexed Signal Configuration Register) - pinmuxing and pinconf + - IMCR (Input Multiplexed Signal Configuration Register)- pinmuxing + - PGPDO (Parallel GPIO Pad Data Out Register) - GPIO output value + - PGPDI (Parallel GPIO Pad Data In Register) - GPIO input value + + Most registers are 32bit wide with the exception of PGPDO/PGPDI which are + 16bit wide. + +properties: + compatible: + enum: + - nxp,s32g2-siul2 + - nxp,s32g3-siul2 + + reg: + maxItems: 2 + + reg-names: + items: + - const: siul20 + - const: siul21 + + gpio-controller: true + + "#gpio-cells": + const: 2 + + gpio-ranges: + maxItems: 2 + + gpio-reserved-ranges: + maxItems: 2 + + interrupts: + maxItems: 1 + + interrupt-controller: true + + "#interrupt-cells": + const: 2 + + nvmem-layout: + $ref: /schemas/nvmem/layouts/nvmem-layout.yaml# + description: + This container may reference an NVMEM layout parser. + +patternProperties: + "-hog(-[0-9]+)?$": + required: + - gpio-hog + + "-pins$": + type: object + additionalProperties: false + + patternProperties: + "-grp[0-9]$": + type: object + allOf: + - $ref: /schemas/pinctrl/pinmux-node.yaml# + - $ref: /schemas/pinctrl/pincfg-node.yaml# + description: + Pinctrl node's client devices specify pin muxes using subnodes, + which in turn use the standard properties below. + + properties: + bias-disable: true + bias-high-impedance: true + bias-pull-up: true + bias-pull-down: true + drive-open-drain: true + input-enable: true + output-enable: true + + pinmux: + description: | + An integer array for representing pinmux configurations of + a device. Each integer consists of a PIN_ID and a 4-bit + selected signal source(SSS) as IOMUX setting, which is + calculated as: pinmux = (PIN_ID << 4 | SSS) + + slew-rate: + description: Supported slew rate based on Fmax values (MHz) + enum: [83, 133, 150, 166, 208] + required: + - pinmux + + additionalProperties: false + +required: + - compatible + - reg + - reg-names + - gpio-controller + - "#gpio-cells" + - gpio-ranges + - gpio-reserved-ranges + - interrupts + - interrupt-controller + - "#interrupt-cells" + +additionalProperties: false + +examples: + - | + #include + #include + + siul2@4009c000 { + compatible = "nxp,s32g2-siul2"; + reg = <0x4009c000 0x179c>, + <0x44010000 0x17b0>; + reg-names = "siul20", "siul21"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&siul2 0 0 102>, <&siul2 112 112 79>; + gpio-reserved-ranges = <102 10>, <123 21>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + + jtag_pins: jtag-pins { + jtag-grp0 { + pinmux = <0x0>; + input-enable; + bias-pull-up; + slew-rate = <166>; + }; + }; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + soc-major@0 { + reg = <0 0x4>; + }; + }; + }; +...