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[2/3] can: flexcan: add NXP S32G2/S32G3 SoC support

Message ID 20241119081053.4175940-3-ciprianmarian.costea@oss.nxp.com (mailing list archive)
State New
Headers show
Series add FlexCAN support for S32G2/S32G3 SoCs | expand

Commit Message

Ciprian Marian Costea Nov. 19, 2024, 8:10 a.m. UTC 
From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>

Add device type data for S32G2/S32G3 SoC.

FlexCAN module from S32G2/S32G3 is similar with i.MX SoCs, but interrupt
management is different. This initial S32G2/S32G3 SoC FlexCAN support
paves the road to address such differences.

Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
---
 drivers/net/can/flexcan/flexcan-core.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

Comments

Frank Li Nov. 19, 2024, 7:50 p.m. UTC | #1 
On Tue, Nov 19, 2024 at 10:10:52AM +0200, Ciprian Costea wrote:
> From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
>
> Add device type data for S32G2/S32G3 SoC.
>
> FlexCAN module from S32G2/S32G3 is similar with i.MX SoCs, but interrupt
> management is different. This initial S32G2/S32G3 SoC FlexCAN support
> paves the road to address such differences.
>
> Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>

Reviewed-by: Frank Li <Frank.Li@nxp.com>

> ---
>  drivers/net/can/flexcan/flexcan-core.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
>
> diff --git a/drivers/net/can/flexcan/flexcan-core.c b/drivers/net/can/flexcan/flexcan-core.c
> index ac1a860986df..f0dee04800d3 100644
> --- a/drivers/net/can/flexcan/flexcan-core.c
> +++ b/drivers/net/can/flexcan/flexcan-core.c
> @@ -386,6 +386,15 @@ static const struct flexcan_devtype_data fsl_lx2160a_r1_devtype_data = {
>  		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR,
>  };
>
> +static const struct flexcan_devtype_data nxp_s32g2_devtype_data = {
> +	.quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_ENABLE_EACEN_RRS |
> +		FLEXCAN_QUIRK_DISABLE_MECR | FLEXCAN_QUIRK_BROKEN_PERR_STATE |
> +		FLEXCAN_QUIRK_USE_RX_MAILBOX | FLEXCAN_QUIRK_SUPPORT_FD |
> +		FLEXCAN_QUIRK_SUPPORT_ECC |
> +		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX |
> +		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR,
> +};
> +
>  static const struct can_bittiming_const flexcan_bittiming_const = {
>  	.name = DRV_NAME,
>  	.tseg1_min = 4,
> @@ -2041,6 +2050,7 @@ static const struct of_device_id flexcan_of_match[] = {
>  	{ .compatible = "fsl,vf610-flexcan", .data = &fsl_vf610_devtype_data, },
>  	{ .compatible = "fsl,ls1021ar2-flexcan", .data = &fsl_ls1021a_r2_devtype_data, },
>  	{ .compatible = "fsl,lx2160ar1-flexcan", .data = &fsl_lx2160a_r1_devtype_data, },
> +	{ .compatible = "nxp,s32g2-flexcan", .data = &nxp_s32g2_devtype_data, },
>  	{ /* sentinel */ },
>  };
>  MODULE_DEVICE_TABLE(of, flexcan_of_match);
> --
> 2.45.2
>
Marc Kleine-Budde Nov. 20, 2024, 9:01 a.m. UTC | #2 
On 19.11.2024 10:10:52, Ciprian Costea wrote:
> From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
> 
> Add device type data for S32G2/S32G3 SoC.
> 
> FlexCAN module from S32G2/S32G3 is similar with i.MX SoCs, but interrupt
> management is different. This initial S32G2/S32G3 SoC FlexCAN support
> paves the road to address such differences.
> 
> Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>

If this flexcan integration has separate IRQ lines for Bus-Off and Error
IRQs, please add the FLEXCAN_QUIRK_NR_IRQ_3 in this initial patch.

regards,
Marc
Ciprian Marian Costea Nov. 20, 2024, 9:16 a.m. UTC | #3 
On 11/20/2024 11:01 AM, Marc Kleine-Budde wrote:
> On 19.11.2024 10:10:52, Ciprian Costea wrote:
>> From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
>>
>> Add device type data for S32G2/S32G3 SoC.
>>
>> FlexCAN module from S32G2/S32G3 is similar with i.MX SoCs, but interrupt
>> management is different. This initial S32G2/S32G3 SoC FlexCAN support
>> paves the road to address such differences.
>>
>> Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
> 
> If this flexcan integration has separate IRQ lines for Bus-Off and Error
> IRQs, please add the FLEXCAN_QUIRK_NR_IRQ_3 in this initial patch.
> 
> regards,
> Marc
> 

Indeed the FlexCAN integration on S32G has separate IRQ lines for 
Bus-Off and Error. I will add 'FLEXCAN_QUIRK_NR_IRQ_3' quirk into the 
initial S32G FlexCAN support commit as suggested, in V2.

Best Regards,
Ciprian
diff mbox series

Patch

diff --git a/drivers/net/can/flexcan/flexcan-core.c b/drivers/net/can/flexcan/flexcan-core.c
index ac1a860986df..f0dee04800d3 100644
--- a/drivers/net/can/flexcan/flexcan-core.c
+++ b/drivers/net/can/flexcan/flexcan-core.c
@@ -386,6 +386,15 @@  static const struct flexcan_devtype_data fsl_lx2160a_r1_devtype_data = {
 		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR,
 };
 
+static const struct flexcan_devtype_data nxp_s32g2_devtype_data = {
+	.quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_ENABLE_EACEN_RRS |
+		FLEXCAN_QUIRK_DISABLE_MECR | FLEXCAN_QUIRK_BROKEN_PERR_STATE |
+		FLEXCAN_QUIRK_USE_RX_MAILBOX | FLEXCAN_QUIRK_SUPPORT_FD |
+		FLEXCAN_QUIRK_SUPPORT_ECC |
+		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX |
+		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR,
+};
+
 static const struct can_bittiming_const flexcan_bittiming_const = {
 	.name = DRV_NAME,
 	.tseg1_min = 4,
@@ -2041,6 +2050,7 @@  static const struct of_device_id flexcan_of_match[] = {
 	{ .compatible = "fsl,vf610-flexcan", .data = &fsl_vf610_devtype_data, },
 	{ .compatible = "fsl,ls1021ar2-flexcan", .data = &fsl_ls1021a_r2_devtype_data, },
 	{ .compatible = "fsl,lx2160ar1-flexcan", .data = &fsl_lx2160a_r1_devtype_data, },
+	{ .compatible = "nxp,s32g2-flexcan", .data = &nxp_s32g2_devtype_data, },
 	{ /* sentinel */ },
 };
 MODULE_DEVICE_TABLE(of, flexcan_of_match);