@@ -175,4 +175,7 @@
#define SSP_1G 2
#define PM_IF_MODE_ENA BIT(15)
+/* Port external MDIO Base address, use to access off-chip PHY */
+#define ENETC4_EMDIO_BASE 0x5c00
+
#endif
@@ -154,6 +154,14 @@ void enetc_pf_netdev_setup(struct enetc_si *si, struct net_device *ndev,
}
EXPORT_SYMBOL_GPL(enetc_pf_netdev_setup);
+static int enetc_get_mdio_base(struct enetc_si *si)
+{
+ if (is_enetc_rev1(si))
+ return ENETC_EMDIO_BASE;
+
+ return ENETC4_EMDIO_BASE;
+}
+
static int enetc_mdio_probe(struct enetc_pf *pf, struct device_node *np)
{
struct device *dev = &pf->si->pdev->dev;
@@ -173,7 +181,7 @@ static int enetc_mdio_probe(struct enetc_pf *pf, struct device_node *np)
bus->parent = dev;
mdio_priv = bus->priv;
mdio_priv->hw = &pf->si->hw;
- mdio_priv->mdio_base = ENETC_EMDIO_BASE;
+ mdio_priv->mdio_base = enetc_get_mdio_base(pf->si);
snprintf(bus->id, MII_BUS_ID_SIZE, "%s", dev_name(dev));
err = of_mdiobus_register(bus, np);
In addition to centrally managing external PHYs through EMIDO device, each ENETC has a set of EMDIO registers to access and manage its own external PHY. When adding i.MX95 ENETC support, the EMDIO base offset was forgot to be updated, which will result in ENETC being unable to manage its external PHY through its own EMDIO registers. Fixes: 99100d0d9922 ("net: enetc: add preliminary support for i.MX95 ENETC PF") Cc: stable@vger.kernel.org Signed-off-by: Wei Fang <wei.fang@nxp.com> --- drivers/net/ethernet/freescale/enetc/enetc4_hw.h | 3 +++ drivers/net/ethernet/freescale/enetc/enetc_pf_common.c | 10 +++++++++- 2 files changed, 12 insertions(+), 1 deletion(-)