diff mbox series

[v2,net,8/9] net: enetc: correct the EMDIO base offset for ENETC v4

Message ID 20250219054247.733243-9-wei.fang@nxp.com (mailing list archive)
State New
Headers show
Series net: enetc: fix some known issues | expand

Commit Message

Wei Fang Feb. 19, 2025, 5:42 a.m. UTC
In addition to centrally managing external PHYs through EMIDO device,
each ENETC has a set of EMDIO registers to access and manage its own
external PHY. When adding i.MX95 ENETC support, the EMDIO base offset
was forgot to be updated, which will result in ENETC being unable to
manage its external PHY through its own EMDIO registers.

Fixes: 99100d0d9922 ("net: enetc: add preliminary support for i.MX95 ENETC PF")
Cc: stable@vger.kernel.org
Signed-off-by: Wei Fang <wei.fang@nxp.com>
---
 drivers/net/ethernet/freescale/enetc/enetc4_hw.h       |  3 +++
 drivers/net/ethernet/freescale/enetc/enetc_pf_common.c | 10 +++++++++-
 2 files changed, 12 insertions(+), 1 deletion(-)

Comments

Andrew Lunn Feb. 19, 2025, 8:42 p.m. UTC | #1
On Wed, Feb 19, 2025 at 01:42:46PM +0800, Wei Fang wrote:
> In addition to centrally managing external PHYs through EMIDO device,
> each ENETC has a set of EMDIO registers to access and manage its own
> external PHY. When adding i.MX95 ENETC support, the EMDIO base offset
> was forgot to be updated, which will result in ENETC being unable to
> manage its external PHY through its own EMDIO registers.

So this never worked?

If it never worked, does it actually bother anybody?

Stable rules say:

  It must either fix a real bug that bothers people or just add a device ID.

	Andrew
Wei Fang Feb. 20, 2025, 8:05 a.m. UTC | #2
> On Wed, Feb 19, 2025 at 01:42:46PM +0800, Wei Fang wrote:
> > In addition to centrally managing external PHYs through EMIDO device,
> > each ENETC has a set of EMDIO registers to access and manage its own
> > external PHY. When adding i.MX95 ENETC support, the EMDIO base offset
> > was forgot to be updated, which will result in ENETC being unable to
> > manage its external PHY through its own EMDIO registers.
> 
> So this never worked?
> 
Yes, for i.MX95 we use EMDIO device to manage all external PHYs

> If it never worked, does it actually bother anybody?
> 
No, just fix it at the code level, the offset of ENETC v4 is not correct.
So I will remove it from this patch set and add it to net-next tree.
Thanks.
Vladimir Oltean Feb. 20, 2025, 3:58 p.m. UTC | #3
On Wed, Feb 19, 2025 at 01:42:46PM +0800, Wei Fang wrote:
> In addition to centrally managing external PHYs through EMIDO device,
                                                          ~~~~~
                                                          EMDIO

> each ENETC has a set of EMDIO registers to access and manage its own
> external PHY. When adding i.MX95 ENETC support, the EMDIO base offset
> was forgot to be updated, which will result in ENETC being unable to
> manage its external PHY through its own EMDIO registers.
> 
> Fixes: 99100d0d9922 ("net: enetc: add preliminary support for i.MX95 ENETC PF")
> Cc: stable@vger.kernel.org
> Signed-off-by: Wei Fang <wei.fang@nxp.com>
> ---

Though I have to agree with Andrew. This looks more like "new feature"
material for net-next, than fixing a bug in an already supported feature.
diff mbox series

Patch

diff --git a/drivers/net/ethernet/freescale/enetc/enetc4_hw.h b/drivers/net/ethernet/freescale/enetc/enetc4_hw.h
index 695cb07c74bc..02d627e2cca6 100644
--- a/drivers/net/ethernet/freescale/enetc/enetc4_hw.h
+++ b/drivers/net/ethernet/freescale/enetc/enetc4_hw.h
@@ -175,4 +175,7 @@ 
 #define   SSP_1G			2
 #define  PM_IF_MODE_ENA			BIT(15)
 
+/* Port external MDIO Base address, use to access off-chip PHY */
+#define ENETC4_EMDIO_BASE		0x5c00
+
 #endif
diff --git a/drivers/net/ethernet/freescale/enetc/enetc_pf_common.c b/drivers/net/ethernet/freescale/enetc/enetc_pf_common.c
index 3fd9b0727875..13e2db561c22 100644
--- a/drivers/net/ethernet/freescale/enetc/enetc_pf_common.c
+++ b/drivers/net/ethernet/freescale/enetc/enetc_pf_common.c
@@ -154,6 +154,14 @@  void enetc_pf_netdev_setup(struct enetc_si *si, struct net_device *ndev,
 }
 EXPORT_SYMBOL_GPL(enetc_pf_netdev_setup);
 
+static int enetc_get_mdio_base(struct enetc_si *si)
+{
+	if (is_enetc_rev1(si))
+		return ENETC_EMDIO_BASE;
+
+	return ENETC4_EMDIO_BASE;
+}
+
 static int enetc_mdio_probe(struct enetc_pf *pf, struct device_node *np)
 {
 	struct device *dev = &pf->si->pdev->dev;
@@ -173,7 +181,7 @@  static int enetc_mdio_probe(struct enetc_pf *pf, struct device_node *np)
 	bus->parent = dev;
 	mdio_priv = bus->priv;
 	mdio_priv->hw = &pf->si->hw;
-	mdio_priv->mdio_base = ENETC_EMDIO_BASE;
+	mdio_priv->mdio_base = enetc_get_mdio_base(pf->si);
 	snprintf(bus->id, MII_BUS_ID_SIZE, "%s", dev_name(dev));
 
 	err = of_mdiobus_register(bus, np);