From patchwork Fri Apr 5 21:42:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= X-Patchwork-Id: 13619453 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BF9DC175557 for ; Fri, 5 Apr 2024 21:46:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.203.201.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712353619; cv=none; b=BAFcbTeCbTDpSZzAT+1HT2LtXkI959hj5n1zXL9Y8fcgmeYPKNBCWGTU0c9FLa6ZN3JL4Ou7oEIxpPg4VyA1EHL63X7ihEBs8U/ZHPDRAXngpI8Pxb3qNDHN55X9vH01WiQ8k9+NxwjZd37+j9LRN17eVy2i1yPE1iWv9ct/v0E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712353619; c=relaxed/simple; bh=JhTSmh4zzQ5wEHoLiy4/dCfRWQEsg0BhNPg7zLHCge8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=gJTtarG5qo+0/WHzsmG1UBFYrQMOHf5JVIQrivgDIFjS9pUZx5sUQWsferVqZamCrEP6MKfjQdLcYf1hHNUTN4mAgJDzQPwlZ8RnwHZOu0guOBd20dbNfcMFpaeUIGoE5u47egEktmL0yGkYGHxLaS7oPnbx8CZWcknJU1tQMBM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de; spf=pass smtp.mailfrom=pengutronix.de; arc=none smtp.client-ip=185.203.201.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pengutronix.de Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.whiteo.stw.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1rsrOZ-0003Ap-69; Fri, 05 Apr 2024 23:46:47 +0200 Received: from [2a0a:edc0:0:900:1d::77] (helo=ptz.office.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1rsrOY-00Ad4C-HO; Fri, 05 Apr 2024 23:46:46 +0200 Received: from ukl by ptz.office.stw.pengutronix.de with local (Exim 4.96) (envelope-from ) id 1rsrOY-00FZpK-1T; Fri, 05 Apr 2024 23:46:46 +0200 From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer Cc: Pengutronix Kernel Team , Fabio Estevam , devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Alexander Stein Subject: [PATCH v1 14/49] ARM: dts: imx6qdl-emcon: Use #pwm-cells = <3> for imx27-pwm device Date: Fri, 5 Apr 2024 23:42:01 +0200 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2612; i=u.kleine-koenig@pengutronix.de; h=from:subject:message-id; bh=JhTSmh4zzQ5wEHoLiy4/dCfRWQEsg0BhNPg7zLHCge8=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBmEHBA+NQOEd7Cr1WSGTHtaZpF+dKCEJ5yze7/Q FvsRHH3JXWJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZhBwQAAKCRCPgPtYfRL+ Tr6TB/4sJjl+Lk8BTneTVI0m+hnyO2Ui+576DvYFm9IGZbsVyGLih49XgLsQew+FB5D/9E0xFuv qab27BGIMNQNAzhDMXiMbqBoYdQlezELrMZE1ofbFVTN6izTbexHlKY0+suiq7WFiT26zMJ96+t +a6x+aS1ZcmLpPuFI0Xlchkp4Ly1GgO9fhu8W049zmdJNDmZQpx5EEAzYqSEIDhVKcpV2+R3xvs KjSkebGih7MqLrChgCNTH67iyaRSlEVubW1ZDfmXJNyUzA8Gce36CjBXZ2K15Timkazkz/V6Qcu IS3sfXxz2WiNSomV7d4vDp1Jwzz85FG8YhQNSdhYZx0mRdl0 X-Developer-Key: i=u.kleine-koenig@pengutronix.de; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: ukl@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: imx@lists.linux.dev The binding dictates using 3 pwm-cells. Adhere to that. This fixes the following dtbs_check warnings: arch/arm/boot/dts/nxp/imx/imx6dl-emcon-avari.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml# arch/arm/boot/dts/nxp/imx/imx6dl-emcon-avari.dtb: pwm@2088000: #pwm-cells:0:0: 3 was expected from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml# arch/arm/boot/dts/nxp/imx/imx6dl-emcon-avari.dtb: pwm@208c000: #pwm-cells:0:0: 3 was expected from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml# arch/arm/boot/dts/nxp/imx/imx6q-emcon-avari.dtb: pwm@2080000: #pwm-cells:0:0: 3 was expected from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml# arch/arm/boot/dts/nxp/imx/imx6q-emcon-avari.dtb: pwm@2088000: #pwm-cells:0:0: 3 was expected from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml# arch/arm/boot/dts/nxp/imx/imx6q-emcon-avari.dtb: pwm@208c000: #pwm-cells:0:0: 3 was expected from schema : http://devicetree.org/schemas/pwm/imx-pwm.yaml# Signed-off-by: Uwe Kleine-König --- arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi index 42b2ba23aefc..a308a3584b62 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-emcon.dtsi @@ -66,7 +66,7 @@ lvds_backlight: lvds-backlight { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_lvds_bl>; enable-gpios = <&gpio6 9 GPIO_ACTIVE_HIGH>; - pwms = <&pwm1 0 50000>; + pwms = <&pwm1 0 50000 0>; brightness-levels = < 0 4 8 16 32 64 80 96 112 128 144 160 176 250 @@ -78,7 +78,7 @@ lvds_backlight: lvds-backlight { pwm_fan: pwm-fan { compatible = "pwm-fan"; #cooling-cells = <2>; - pwms = <&pwm4 0 50000>; + pwms = <&pwm4 0 50000 0>; cooling-levels = <0 64 127 191 255>; status = "disabled"; }; @@ -145,7 +145,7 @@ rgb_backlight: rgb-backlight { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_rgb_bl>; enable-gpios = <&gpio6 8 GPIO_ACTIVE_HIGH>; - pwms = <&pwm3 0 5000000>; + pwms = <&pwm3 0 5000000 0>; brightness-levels = < 250 176 160 144 128 112 96 80 64 48 32 16 8 1 @@ -736,17 +736,14 @@ &pcie { }; &pwm1 { - #pwm-cells = <2>; status = "okay"; }; &pwm3 { - #pwm-cells = <2>; status = "okay"; }; &pwm4 { - #pwm-cells = <2>; status = "okay"; };