From patchwork Wed Sep 25 18:10:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Gupta, Anshuman" X-Patchwork-Id: 11161181 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 35B6B13B1 for ; Wed, 25 Sep 2019 18:16:40 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1D97D207E0 for ; Wed, 25 Sep 2019 18:16:40 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1D97D207E0 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8AF196EC87; Wed, 25 Sep 2019 18:16:39 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 318376EC91 for ; Wed, 25 Sep 2019 18:16:39 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Sep 2019 11:16:38 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,549,1559545200"; d="scan'208";a="364405653" Received: from genxfsim-desktop.iind.intel.com ([10.223.74.120]) by orsmga005.jf.intel.com with ESMTP; 25 Sep 2019 11:16:36 -0700 From: Anshuman Gupta To: intel-gfx@lists.freedesktop.org Date: Wed, 25 Sep 2019 23:40:16 +0530 Message-Id: <20190925181023.12290-1-anshuman.gupta@intel.com> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v9 0/7] DC3CO Support for TGL X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" v9 revision is a rework of series, which has fixed the review comments provided by Imre and added Animesh's RB on following two patches. 1.Add DC3CO required register and bits 2.Add DC3CO mask to allowed_dc_mask and gen9_dc_mask Anshuman Gupta (7): drm/i915/tgl: Add DC3CO required register and bits drm/i915/tgl: Add DC3CO mask to allowed_dc_mask and gen9_dc_mask drm/i915/tgl: Enable DC3CO state in "DC Off" power well drm/i915/tgl: Do modeset to enable and configure DC3CO exitline drm/i915/tgl: DC3CO PSR2 helper drm/i915/tgl: switch between dc3co and dc5 based on display idleness drm/i915/tgl: Add DC3CO counter in i915_dmc_info drivers/gpu/drm/i915/display/intel_ddi.c | 7 + drivers/gpu/drm/i915/display/intel_display.c | 1 + .../drm/i915/display/intel_display_power.c | 336 +++++++++++++++++- .../drm/i915/display/intel_display_power.h | 13 + .../drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/display/intel_dp.c | 2 + .../gpu/drm/i915/display/intel_frontbuffer.c | 1 + drivers/gpu/drm/i915/display/intel_psr.c | 42 +++ drivers/gpu/drm/i915/display/intel_psr.h | 2 + drivers/gpu/drm/i915/i915_debugfs.c | 6 + drivers/gpu/drm/i915/i915_drv.h | 3 + drivers/gpu/drm/i915/i915_params.c | 3 +- drivers/gpu/drm/i915/i915_reg.h | 10 + 13 files changed, 411 insertions(+), 16 deletions(-)