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[v10,0/6] DC3CO Support for TGL

Message ID 20190930174137.15233-1-anshuman.gupta@intel.com (mailing list archive)
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Series DC3CO Support for TGL | expand

Message

Gupta, Anshuman Sept. 30, 2019, 5:41 p.m. UTC 
This v10 revision has most of the chages related to dc3co series
code refactoring and fixes for few review comment provided by imre. 

Anshuman Gupta (6):
  drm/i915/tgl: Add DC3CO required register and bits
  drm/i915/tgl: Add DC3CO mask to allowed_dc_mask and gen9_dc_mask
  drm/i915/tgl: Enable DC3CO state in "DC Off" power well
  drm/i915/tgl: Do modeset to enable and configure DC3CO exitline
  drm/i915/tgl: Switch between dc3co and dc5 based on display idleness
  drm/i915/tgl: Add DC3CO counter in i915_dmc_info

 drivers/gpu/drm/i915/display/intel_ddi.c      | 104 +++++++++++-
 drivers/gpu/drm/i915/display/intel_display.c  |   1 +
 .../drm/i915/display/intel_display_power.c    | 154 ++++++++++++++++--
 .../drm/i915/display/intel_display_power.h    |   3 +
 .../drm/i915/display/intel_display_types.h    |   1 +
 drivers/gpu/drm/i915/display/intel_psr.c      | 109 ++++++++++++-
 drivers/gpu/drm/i915/i915_debugfs.c           |   7 +
 drivers/gpu/drm/i915/i915_drv.h               |   4 +
 drivers/gpu/drm/i915/i915_params.c            |   3 +-
 drivers/gpu/drm/i915/i915_reg.h               |  10 ++
 10 files changed, 377 insertions(+), 19 deletions(-)