From patchwork Thu Oct 3 15:06:47 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Manna, Animesh" X-Patchwork-Id: 11172765 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8EFE915AB for ; Thu, 3 Oct 2019 15:15:29 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 76F0420700 for ; Thu, 3 Oct 2019 15:15:29 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 76F0420700 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 78ED56E14B; Thu, 3 Oct 2019 15:15:28 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id C0E436E14B for ; Thu, 3 Oct 2019 15:15:26 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 03 Oct 2019 08:15:26 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.67,252,1566889200"; d="scan'208";a="391976221" Received: from amanna.iind.intel.com ([10.223.74.216]) by fmsmga005.fm.intel.com with ESMTP; 03 Oct 2019 08:15:22 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org Date: Thu, 3 Oct 2019 20:36:47 +0530 Message-Id: <20191003150653.15881-1-animesh.manna@intel.com> X-Mailer: git-send-email 2.22.0 MIME-Version: 1.0 Subject: [Intel-gfx] [RFC 0/6] DP Phy compliace auto test. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Driver changes mainly to process the request coming from Test equipment as short pulse hpd interrupt to change link-pattern/v-swing/pre-emphasis Complete auto test suite takes much lesser time than manual run. Overall design: -------------- Automate test request will come to source device as HDP short pulse interrupt from test scope. Read DPCD 0x201, Check for bit 1 for automated test request. If set continue and read DPCD 0x218. Check for bit 3 for phy test pattern, If set continue. Get the requested test pattern through DPCD 0x248. Compute requested voltage swing level and pre-emphasis level from DPCD 0x206 and 0x207 Set signal level through vswing programming sequence. Write DDI_COMP_CTL and DDI_COMP_PATx as per requested pattern. Configure the link and write the new test pattern through DPCD. High level patch description. ----------------------------- patch 1: drm level api added to get/set test pattern as per vesa DP spec. This maybe useful for other driver so added in drm layer. patch 2: vswing/preemphasis adjustment calculation is needed during phy compliance request processing along with existing link training process, so moved the same function in intel_dp.c. patch 3: Parse the test scope request regarding test rquested pattern, vswing level, preemphasis level. patch 4: Register difnition of DP compliance register added. patch 5: Funcion added to update the pattern in source side. patch 6: This patch os mainly processing the request. Currently through prototyping patch able to run DP compliance where vswing, preemphasis and test pattern is changing fine but complete test is under process. In parallel want to start design discussion so sending the above patches as RFC. Animesh Manna (6): drm/dp: get/set phy compliance pattern. drm/i915/dp: Move vswing/pre-emphasis adjustment calculation drm/i915/dp: Preparation for DP phy compliance auto test. drm/i915/dp: Register definition for DP compliance register. drm/i915/dp: Update the pattern as per request. drm/i915/dp: Program vswing, pre-emphasis, test-pattern drivers/gpu/drm/drm_dp_helper.c | 77 ++++++++ .../drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/display/intel_dp.c | 178 ++++++++++++++++++ drivers/gpu/drm/i915/display/intel_dp.h | 3 + .../drm/i915/display/intel_dp_link_training.c | 32 ---- drivers/gpu/drm/i915/i915_reg.h | 20 ++ include/drm/drm_dp_helper.h | 28 +++ 7 files changed, 307 insertions(+), 32 deletions(-)