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[v6,0/3] drm/i915: timeline semaphore support

Message ID 20191210233453.183910-1-lionel.g.landwerlin@intel.com (mailing list archive)
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Series drm/i915: timeline semaphore support | expand

Message

Lionel Landwerlin Dec. 10, 2019, 11:34 p.m. UTC
Hi all,

Following the last set of IGT tests on the mailing list, Chris made an
interesting comment about engine to engine synchronization.

Indeed with dma-fence-chain, i915 is unable to detect i915 fences
given as wait dependencies to the execbuf, because those are now
wrapped into a dma-fence-chain.

Our submission code has an interesting optimization where it uses HW
semaphores to create a dependency between 2 requests, thus doing away
with the need for the host to submit a request once its dependencies
have completed.

This v6 tries to work around this performance degration due to
dma-fence-chains by peeling them when adding fences waits to a
request.

It is still possible that a dma-fence-chain wraps another
dma-fence-chain but I think those cases will be rare enough we don't
want to care about them.

Cheers,

Lionel Landwerlin (3):
  drm/i915: introduce a mechanism to extend execbuf2
  drm/i915: add syncobj timeline support
  drm/i915: peel dma-fence-chains wait fences

 .../gpu/drm/i915/gem/i915_gem_execbuffer.c    | 379 +++++++++++++++---
 drivers/gpu/drm/i915/i915_drv.c               |   3 +-
 drivers/gpu/drm/i915/i915_getparam.c          |   1 +
 include/uapi/drm/i915_drm.h                   |  64 ++-
 4 files changed, 385 insertions(+), 62 deletions(-)

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2.24.0