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[0/1] Display glitches fixes

Message ID 20201204081845.26528-1-anshuman.gupta@intel.com (mailing list archive)
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Series Display glitches fixes | expand

Message

Gupta, Anshuman Dec. 4, 2020, 8:18 a.m. UTC
TGL chrome-OS platform has observed display glitches while
display brightness is being changed rapidly.
It creates a scenario where brightness is being changed simultaneously
with display flips updates in different threads.

Brightness update requires pps_lock, current pps_lock implementation
requires to get AUX power domain, which triggers DC3CO disallow/allow
sequence being async with display flips.

This triggers a race between dc3co exit delay and display flip,
and potentially causing a display glitch due to some display register
being programmed before completing dc3co exit delay.
Exactly which register programming causing this glitch is still
being work in progressed.

This patch adds a optimization to avoid unnecessary "DC off"
power well enable/disable(D3CO disallow/allow) noise around
brightness update.

This patch helps to remove the display glitch in case of simultaneous
brightness update and display flips.

Anshuman Gupta (1):
  drm/i915/dp: optimize pps_lock wherever required

 drivers/gpu/drm/i915/display/intel_dp.c | 47 +++++++++++++++++++++++--
 1 file changed, 45 insertions(+), 2 deletions(-)