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[0/9] Final set of patches for ADLS enabling

Message ID 20210127041159.136409-1-aditya.swarup@intel.com (mailing list archive)
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Series Final set of patches for ADLS enabling | expand

Message

Aditya Swarup Jan. 27, 2021, 4:11 a.m. UTC
These are the final set of patches required for enabling ADL-S. The
patches have been tested on platform and all display outputs are
working.

Aditya Swarup (2):
  drm/i915/adl_s: Add display WAs for ADL-S
  drm/i915/adl_s: Add GT and CTX WAs for ADL-S

Anusha Srivatsa (1):
  drm/i915/adl_s: Load DMC

Caz Yokoyama (1):
  drm/i915/adl_s: MCHBAR memory info registers are moved

José Roberto de Souza (1):
  drm/i915/display: Add HAS_D12_PLANE_MINIMIZATION

Lucas De Marchi (1):
  drm/i915/adl_s: Add power wells

Matt Roper (2):
  drm/i915/adl_s: Update PHY_MISC programming
  drm/i915/adl_s: Re-use TGL GuC/HuC firmware

Tejas Upadhyay (1):
  drm/i915/adl_s: Update memory bandwidth parameters

 drivers/gpu/drm/i915/display/intel_bw.c       |  8 +++++
 .../gpu/drm/i915/display/intel_combo_phy.c    | 12 +++++--
 drivers/gpu/drm/i915/display/intel_csr.c      | 10 +++++-
 .../drm/i915/display/intel_display_power.c    |  9 ++---
 drivers/gpu/drm/i915/display/intel_sprite.c   |  6 ++--
 drivers/gpu/drm/i915/gt/intel_workarounds.c   | 34 ++++++++++++-------
 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c      |  4 ++-
 drivers/gpu/drm/i915/i915_drv.h               |  3 ++
 drivers/gpu/drm/i915/i915_irq.c               |  2 +-
 drivers/gpu/drm/i915/i915_reg.h               |  5 +++
 drivers/gpu/drm/i915/intel_device_info.c      |  8 +++--
 drivers/gpu/drm/i915/intel_dram.c             | 24 +++++++++----
 12 files changed, 91 insertions(+), 34 deletions(-)