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[v1,0/1] drm/i915/xelpd: Enabling dithering after the CC1

Message ID 20210526020611.27572-1-nischal.varide@intel.com (mailing list archive)
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Series drm/i915/xelpd: Enabling dithering after the CC1 | expand

Message

Nischal Varide May 26, 2021, 2:06 a.m. UTC
If the panel is 12bpc then Dithering is not enabled in the Legacy
dithering block , instead its Enabled after the C1 CC1 pipe post
color space conversion.For a 6bpc pannel Dithering is enabled in
Legacy block.

Nischal Varide (1):
  drm/i915/xelpd: Enabling dithering after the CC1

 drivers/gpu/drm/i915/display/intel_color.c   | 15 +++++++++++++++
 drivers/gpu/drm/i915/display/intel_display.c |  7 ++++++-
 drivers/gpu/drm/i915/i915_reg.h              |  3 ++-
 3 files changed, 23 insertions(+), 2 deletions(-)