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[0/2] drm/i915/psr: Disable PSR2 when SDP is sent on prior line

Message ID 20220905102355.176622-1-jouni.hogander@intel.com (mailing list archive)
Headers show
Series drm/i915/psr: Disable PSR2 when SDP is sent on prior line | expand

Message

Hogander, Jouni Sept. 5, 2022, 10:23 a.m. UTC 
Selective update doesn't work if SU start address is 0 and start/end
SDP is configured to be sent prior to SU start/end lines. PSR2 has to
be disabled in this case for Alder Lake.

Additionally this patch set updates changed equation for sending
start/end SDP prior to the SU region start/end.

Cc: Mika Kahola <mika.kahola@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>

Jouni Högander (2):
  drm/i915/psr: Equation changed for sending start/stop on prior line
  drm/i915/psr: Disable PSR2 when SDP is sent on prior line

 drivers/gpu/drm/i915/display/intel_psr.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

Comments

Ville Syrjälä Sept. 13, 2022, 9:14 a.m. UTC | #1 
On Mon, Sep 05, 2022 at 01:23:53PM +0300, Jouni Högander wrote:
> Selective update doesn't work if SU start address is 0 and start/end
> SDP is configured to be sent prior to SU start/end lines. PSR2 has to
> be disabled in this case for Alder Lake.
> 
> Additionally this patch set updates changed equation for sending
> start/end SDP prior to the SU region start/end.
> 
> Cc: Mika Kahola <mika.kahola@intel.com>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> 
> Jouni Högander (2):
>   drm/i915/psr: Equation changed for sending start/stop on prior line
>   drm/i915/psr: Disable PSR2 when SDP is sent on prior line

Series pushed to drm-intel-next. Thanks.

> 
>  drivers/gpu/drm/i915/display/intel_psr.c | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)
> 
> -- 
> 2.34.1