From patchwork Fri Oct 21 00:20:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Srivatsa, Anusha" X-Patchwork-Id: 13014160 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 03322C4332F for ; Fri, 21 Oct 2022 00:20:54 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0ED7F10E500; Fri, 21 Oct 2022 00:20:52 +0000 (UTC) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id DDDF610E524 for ; Fri, 21 Oct 2022 00:20:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1666311622; x=1697847622; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=k2IQalHkXjLNqroHQfsoznhqQDfVGREsNXQGyJLLEKk=; b=Gb6s22gPOihsIlneRh8fqsn4Mq+g2RQHRrYQ0B2LRRYaez9/cBTz3Pto OaLG7BIbmmsIPN6dQG/90ES9LOf7QJuba4gqgnhvQEYbcZVkzbNkZ35V1 6Htz4sjueEA7Mj4naNWr3FnSXsl1fnTOyRlNlCl6t+1n5wBa8a4VchDvr sr4n5Cm8VFzStTcVFzFFXE/yFuf4O/p9j/qINUM+k3PCR6JGJV58mrEfk 1MTKj4lbXZJ8Ee3AA6bWVpWjtEk4EOM6+UGOl735aJaQ6xajTi5y8jzFW xeYzpGUIV1lEJjbKoX2hCoW8cr4Bt4SO045l0QsInmOEmXWnHPBnaxnhS g==; X-IronPort-AV: E=McAfee;i="6500,9779,10506"; a="307971568" X-IronPort-AV: E=Sophos;i="5.95,200,1661842800"; d="scan'208";a="307971568" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Oct 2022 17:20:21 -0700 X-IronPort-AV: E=McAfee;i="6500,9779,10506"; a="805232099" X-IronPort-AV: E=Sophos;i="5.95,200,1661842800"; d="scan'208";a="805232099" Received: from aclausch-mobl.amr.corp.intel.com (HELO anushasr-mobl7.intel.com) ([10.212.253.196]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Oct 2022 17:20:20 -0700 From: Anusha Srivatsa To: intel-gfx@lists.freedesktop.org Date: Thu, 20 Oct 2022 17:20:20 -0700 Message-Id: <20221021002024.390052-1-anusha.srivatsa@intel.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 0/4] Prep series - CDCLK code churn X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Balasubramani Vivekanandan Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" No functional changes. The series is more of a prep series for the mid_cdclk_config series: https://patchwork.freedesktop.org/series/109694/ Main change: - Change usage of "crawler" and "squasher". Use crawling and squashing instead. - Handle bot hsquash and cralw similar in terms of checking if the platform supports them or not. With the changes introduced, both are a display feature flag. - Move code from bxt_set_cdclk() to make it more modularized and easy to read and understand. Cc: Balasubramani Vivekanandan Cc: Ville Syrjälä Anusha Srivatsa (4): drm/i915/display: Change terminology for cdclk actions drm/i915/display: Introduce HAS_CDCLK_SQUASH macro drm/i915/display: Move chunks of code out of bxt_set_cdclk() drm/i915/display: Move squash_ctl register programming to its own function drivers/gpu/drm/i915/display/intel_cdclk.c | 80 ++++++++++++---------- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_pci.c | 1 + drivers/gpu/drm/i915/intel_device_info.h | 1 + 4 files changed, 48 insertions(+), 35 deletions(-)