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[0/5] Improvements to GuC error capture list processing

Message ID 20230406222617.790484-1-John.C.Harrison@Intel.com (mailing list archive)
Headers show
Series Improvements to GuC error capture list processing | expand

Message

John Harrison April 6, 2023, 10:26 p.m. UTC 
From: John Harrison <John.C.Harrison@Intel.com>

The GuC error capture list creation was including Gen8 registers on Xe
platforms. While fixing that, it was noticed that there were other
issues. The platform naming was wrong, the naming of lists was
misleading, the steered register code was duplicated and steered
registers were not included on all supported platforms.

NB: The changes are being sent as multiple patches to make code review
simpler. However, before merging it may be better to squash into a
single patch, especially if it going to be sent with a 'fixes' tag.

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>


John Harrison (5):
  drm/i915/guc: Don't capture Gen8 regs on Xe devices
  drm/i915/guc: Capture list clean up - 1
  drm/i915/guc: Capture list clean up - 2
  drm/i915/guc: Capture list clean up - 3
  drm/i915/guc: Capture list clean up - 4

 .../gpu/drm/i915/gt/uc/intel_guc_capture.c    | 199 +++++++-----------
 1 file changed, 73 insertions(+), 126 deletions(-)