From patchwork Thu Dec 7 22:10:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sripada, Radhakrishna" X-Patchwork-Id: 13484410 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0E971C4167B for ; Thu, 7 Dec 2023 22:12:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 064CD10E217; Thu, 7 Dec 2023 22:12:00 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id A689110E217 for ; Thu, 7 Dec 2023 22:11:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701987119; x=1733523119; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=WGHckhPRF8qyfSVt4xx3eFcZqj0uuTFR01P8uWwwq78=; b=RayVza4MNTncbKK9Pptbbmuydetlwk1J2uBnIutpenal66QmtXtVcP3v 1EwXm1QLnhjKcsyGNROT8WWzpbvfIVtiSiM+qYqD+bU8qwO6yD+pcIjk0 JRFRMBHavuf7ZBOtwAzu5DYvK0Vqy4fSmYmQDaL0SfWdJ3BjH6g8ZN1Rw rMwGGfQ5Hk8paTBFJECSxqMSOzgAredOM6Rgq8HwBGXlVslgTRT8weRzQ 8lUOgAmbEzkX0t8Y6+sFjSmeKwgHG6z+Jt5QrgPMQh8RV5VMC6VP6kxBK meVe7d9V8X5/Ff8uSVbWSVJdI+rOOHiFOJd+jeM875niTsvdZIypvKbRT w==; X-IronPort-AV: E=McAfee;i="6600,9927,10917"; a="1179282" X-IronPort-AV: E=Sophos;i="6.04,258,1695711600"; d="scan'208";a="1179282" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Dec 2023 14:11:59 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.04,258,1695711600"; d="scan'208";a="13257008" Received: from invictus.jf.intel.com ([10.165.21.201]) by orviesa002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Dec 2023 14:11:58 -0800 From: Radhakrishna Sripada To: intel-gfx@lists.freedesktop.org Subject: [PATCH 0/3] Cleanup C20 pll state Date: Thu, 7 Dec 2023 14:10:22 -0800 Message-Id: <20231207221025.2032207-1-radhakrishna.sripada@intel.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" C20 pll state has both link_bit_rate and clock fields to represent the clocks. Both have the same values for DP 1.4 they difer for DP2.0. Stick to the numbers that are compatible with other clock numbers like the port_clock in crtc_state Radhakrishna Sripada (3): drm/i915/mtl: Use port clock compatible numbers for C20 phy drm/i915/mtl: Remove misleading "clock" field from C20 pll_state drm/i915/mtl: Rename the link_bit_rate to clock in C20 pll_state drivers/gpu/drm/i915/display/intel_cx0_phy.c | 79 ++++++++----------- .../drm/i915/display/intel_display_types.h | 1 - 2 files changed, 31 insertions(+), 49 deletions(-)