mbox series

[0/6] drm/i915/dp: Add jitter WAs for MST/FEC/DSC links

Message ID 20240129175533.904590-1-imre.deak@intel.com (mailing list archive)
Headers show
Series drm/i915/dp: Add jitter WAs for MST/FEC/DSC links | expand

Message

Imre Deak Jan. 29, 2024, 5:55 p.m. UTC 
Add workarounds to fix jitter issues on non-UHBR/UHBR MST/FEC/DSC links.
This fixes at least the output on MTLP + a DELL docking station MST/DSC
link with different monitors connected.

Imre Deak (6):
  drm/i915/adlp: Add MST FEC BS jitter WA (Wa_14013163432)
  drm/i915/adlp: Add MST short HBlank WA (Wa_14014143976)
  drm/i915/adlp: Add DP MST DPT/DPTP alignment WA (Wa_14014143976)
  drm/i915/adlp+: Add DSC early pixel count scaling WA (Wa_1409098942)
  drm/i915/mtl+: Disable DP/DSC SF insertion at EOL WA
  drm/i915/mtl: Add DP FEC BS jitter WA

 drivers/gpu/drm/i915/display/intel_display.c | 25 ++++++++++++++
 drivers/gpu/drm/i915/display/intel_dp_mst.c  | 35 ++++++++++++++++++++
 drivers/gpu/drm/i915/i915_reg.h              | 10 ++++++
 3 files changed, 70 insertions(+)

Comments

Imre Deak April 10, 2024, 4:30 p.m. UTC | #1 
On Mon, Jan 29, 2024 at 06:42:39PM +0000, Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915/dp: Add jitter WAs for MST/FEC/DSC links
> URL   : https://patchwork.freedesktop.org/series/129277/
> State : success

Patchset is pushed to drm-intel-next, fixing the WA code comment in
patch 4, thanks for the review.

> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_14192 -> Patchwork_129277v1
> ====================================================
> 
> Summary
> -------
> 
>   **SUCCESS**
> 
>   No regressions found.
> 
>   External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129277v1/index.html
> 
> Participating hosts (37 -> 35)
> ------------------------------
> 
>   Missing    (2): bat-mtlp-8 fi-snb-2520m 
> 
> Known issues
> ------------
> 
>   Here are the changes found in Patchwork_129277v1 that come from known issues:
> 
> ### IGT changes ###
> 
> #### Issues hit ####
> 
>   * igt@i915_hangman@error-state-basic:
>     - bat-mtlp-6:         [PASS][1] -> [ABORT][2] ([i915#9414])
>    [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14192/bat-mtlp-6/igt@i915_hangman@error-state-basic.html
>    [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129277v1/bat-mtlp-6/igt@i915_hangman@error-state-basic.html
> 
>   
> #### Possible fixes ####
> 
>   * igt@i915_selftest@live@execlists:
>     - fi-bsw-nick:        [ABORT][3] ([i915#7911]) -> [PASS][4]
>    [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14192/fi-bsw-nick/igt@i915_selftest@live@execlists.html
>    [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129277v1/fi-bsw-nick/igt@i915_selftest@live@execlists.html
> 
>   * igt@i915_selftest@live@hangcheck:
>     - {bat-adls-6}:       [DMESG-WARN][5] ([i915#5591]) -> [PASS][6]
>    [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14192/bat-adls-6/igt@i915_selftest@live@hangcheck.html
>    [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129277v1/bat-adls-6/igt@i915_selftest@live@hangcheck.html
> 
>   
>   {name}: This element is suppressed. This means it is ignored when computing
>           the status of the difference (SUCCESS, WARNING, or FAILURE).
> 
>   [i915#5591]: https://gitlab.freedesktop.org/drm/intel/issues/5591
>   [i915#7911]: https://gitlab.freedesktop.org/drm/intel/issues/7911
>   [i915#9414]: https://gitlab.freedesktop.org/drm/intel/issues/9414
> 
> 
> Build changes
> -------------
> 
>   * Linux: CI_DRM_14192 -> Patchwork_129277v1
> 
>   CI-20190529: 20190529
>   CI_DRM_14192: f4c0dac89bd3cd02a1afe5e7a91ed4bf8de4afc6 @ git://anongit.freedesktop.org/gfx-ci/linux
>   IGT_7698: af750f5e7eaad98d40d8c924eb5f05e99d3c668b @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
>   Patchwork_129277v1: f4c0dac89bd3cd02a1afe5e7a91ed4bf8de4afc6 @ git://anongit.freedesktop.org/gfx-ci/linux
> 
> 
> ### Linux commits
> 
> 684e00785693 drm/i915/mtl: Add DP FEC BS jitter WA
> 4710e5a9e439 drm/i915/mtl+: Disable DP/DSC SF insertion at EOL WA
> f5853ef36adf drm/i915/adlp+: Add DSC early pixel count scaling WA (Wa_1409098942)
> 58b3ea4c8782 drm/i915/adlp: Add DP MST DPT/DPTP alignment WA (Wa_14014143976)
> a8501371285d drm/i915/adlp: Add MST short HBlank WA (Wa_14014143976)
> b689adcd3028 drm/i915/adlp: Add MST FEC BS jitter WA (Wa_14013163432)
> 
> == Logs ==
> 
> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129277v1/index.html