Message ID | 20240326231021.281780-1-vinod.govindapillai@intel.com (mailing list archive) |
---|---|
Headers | show |
Series | QGV/SAGV related fixes | expand |
Hi Ville, Regarding the patch 5/6 in this series, I have asked the pcode team for clarifications on how to handle cases with duplicate QGV points. Please note that I added a new patch to force the QGV check after HW state readout (patch 6/6) without that we won't be updating the QGV unless there are some changes in data rate etc. I added it using a new flag in bw_state. Please let me know if there is any better way to handle this. Initially I was thinking of refactoring a bit to extract qgv points mask from new_bw_state all the time in the intel_bw_atomic_check() and compare it with old_bw_state's qgv points mask. But as such a case happen only after the hw state readout, thought calculating qgvpoints mask every time might not be efficient! BR Vinod On Wed, 2024-03-27 at 01:10 +0200, Vinod Govindapillai wrote: > We have couple of customer issues, related to SAGV/QGV point > calculation. Those patches contain fixes plus some additional > debugs for those issues. > > Stanislav Lisovskiy (4): > drm/i915/display: Add meaningful traces for QGV point info error > handling > drm/i915/display: Extract code required to calculate max qgv/psf gv > point > drm/i915/display: Disable SAGV on bw init, to force QGV point > recalculation > drm/i915/display: handle systems with duplicate qgv/psf gv points > > Vinod Govindapillai (2): > drm/i915/display: extract code to prepare qgv points mask > drm/i915/display: force qgv check after the hw state readout > > drivers/gpu/drm/i915/display/intel_bw.c | 162 ++++++++++++++----- > drivers/gpu/drm/i915/display/intel_bw.h | 6 + > drivers/gpu/drm/i915/display/skl_watermark.c | 2 +- > drivers/gpu/drm/i915/display/skl_watermark.h | 1 + > drivers/gpu/drm/i915/soc/intel_dram.c | 2 + > 5 files changed, 131 insertions(+), 42 deletions(-) >