mbox series

[v8,00/20] Panel Replay eDP support

Message ID 20240613093239.1293629-1-jouni.hogander@intel.com (mailing list archive)
Headers show
Series Panel Replay eDP support | expand

Message

Hogander, Jouni June 13, 2024, 9:32 a.m. UTC
This patch set is implementing eDP1.5 Panel Replay for Intel hw. Patch
to disable Region Early Transport by default is reverted as it is
needed by eDP Panel Replay.

v8:
  - series reordered to ease merging subset
  - wa 16021440873 modified
  - Fix port clock usage in AUX Less wake time calculation
  - Disable PSR/Panel Replay on sink side for PSR only
v7:
  - fix improper SU area width
  - writing wrong register in Wa 16021440873
  - disable Panel Replay if psr_enable is set != -1
  - perfrom ALPM check for Panel Replay Full Frame update
  - printout why Panel Replay is disabled
v6:
  - fix and rework sink enable
  - rework checking vblank length for LunarLake and Panel Replay
  - reorder patches
v5:
  - use psr->su_region_et_enabled instead of psr2_su_region_et_valid
  - do not check Vblank >= PSR2_CTL Block Count Number for Panel Replay
v4:
  - add some patch from "Panel Replay fixes" set here
  - check 128b/132b encoding and HDCP enable
  - use intel_alpm_aux_wake_supported instead of local variable
  - printout debug info in case Panel Replay is prevented
v3:
  - commit message modifications
  - s/intel_psr_psr_mode/intel_psr_print_mode/
  - remove extra space from "PSR mode:  disabled"
  - do not allow eDP Panel Replay when using 128b/132b encoding
  - do not allow eDP Panel Replay when HDCP is enabled
v2:
  - printout "Selective Update enabled (Early Transport)" instead of
    "Selective Update Early Transport enabled"
  - ensure that fastset is performed when the disable bit changes

Jouni Högander (20):
  drm/i915/psr: Set SU area width as pipe src width
  drm/i915/display: Wa 16021440873 is writing wrong register
  drm/i915/alpm: Fix port clock usage in AUX Less wake time calculation
  drm/i915/psr: Add Panel Replay compute_config helper
  drm/i915/psr: Disable Panel Replay if PSR mode is set via module
    parameter
  drm/i915/psr: Disable PSR2 SU Region Early Transport if psr_enable is
    set
  drm/i915/psr: Disable PSR/Panel Replay on sink side for PSR only
  drm/i915/psr: Add new debug bit to disable Panel Replay
  Revert "drm/i915/psr: Disable early transport by default"
  drm/i915/psr: Check panel ALPM capability for eDP Panel Replay
  drm/i915/psr: Inform Panel Replay source support on eDP as well
  drm/i915/psr: enable sink for eDP1.5 Panel Replay
  drm/i915/psr: Check panel Early Transport capability for eDP PR
  drm/i915/psr: 128b/132b Panel Replay is not supported on eDP
  drm/i915/psr: HW will not allow PR on eDP when HDCP enabled
  drm/i915/alpm: Make crtc_state as const in intel_alpm_compute_params
  drm/i915/psr: Perform psr2 checks related to ALPM for Panel Replay
  drm/i915/psr: Perform scanline indication check for Panel Replay as
    well
  drm/i915/psr: Check Early Transport for Panel Replay as well
  drm/i915/psr: Modify dg2_activate_panel_replay to support eDP

 drivers/gpu/drm/i915/display/intel_alpm.c     |  12 +-
 drivers/gpu/drm/i915/display/intel_alpm.h     |   2 +-
 drivers/gpu/drm/i915/display/intel_cursor.c   |   4 +-
 .../drm/i915/display/intel_display_params.c   |   3 +-
 .../drm/i915/display/intel_display_types.h    |   1 +
 drivers/gpu/drm/i915/display/intel_psr.c      | 237 ++++++++++++++----
 6 files changed, 195 insertions(+), 64 deletions(-)