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[0/5] drm/i915/bios: Refactor ROM access

Message ID 20240910134219.28479-1-ville.syrjala@linux.intel.com (mailing list archive)
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Series drm/i915/bios: Refactor ROM access | expand

Message

Ville Syrjälä Sept. 10, 2024, 1:42 p.m. UTC 
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Unify the behaviour of the PCI ROM vs. SPI flash VBT
read codepaths, and relocate out the low level nuts details
from intel_bios.c into a new soc/intel_rom.c file.

Ville Syrjälä (5):
  drm/i915/bios: Add some size checks to SPI VBT read
  drm/i915/bios: Round PCI ROM VBT allocation to multiple of 4
  drm/i915/bios: Extract intel_spi_read16()
  drm/i915/bios: Extract vbt_signature[]
  drm/i915/bios: Extract soc/intel_rom.c

 drivers/gpu/drm/i915/Makefile                 |   3 +-
 drivers/gpu/drm/i915/display/intel_bios.c     | 141 ++++-----------
 drivers/gpu/drm/i915/soc/intel_rom.c          | 160 ++++++++++++++++++
 drivers/gpu/drm/i915/soc/intel_rom.h          |  25 +++
 drivers/gpu/drm/xe/Makefile                   |   3 +-
 .../xe/compat-i915-headers/soc/intel_rom.h    |   6 +
 6 files changed, 230 insertions(+), 108 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/soc/intel_rom.c
 create mode 100644 drivers/gpu/drm/i915/soc/intel_rom.h
 create mode 100644 drivers/gpu/drm/xe/compat-i915-headers/soc/intel_rom.h