mbox series

[00/10] Add xe3lpd edp enabling

Message ID 20241008223741.82790-1-matthew.s.atwood@intel.com (mailing list archive)
Headers show
Series Add xe3lpd edp enabling | expand

Message

Matt Atwood Oct. 8, 2024, 10:37 p.m. UTC
This series defines the xe3lpd definition, which is functionally
identical to the xe2lpd definition for now. This series then adds
additional requirements mostly for edp output of display through.
Additional patches will be required for display and will follow. 

Clint Taylor (1):
  drm/i915/xe3lpd: reuse xe2lpd definition

Matt Roper (3):
  drm/i915/xe3lpd: Adjust watermark calculations
  drm/i915/xe3lpd: Add new display power wells
  drm/i915/xe3lpd: Update pmdemand programming

Radhakrishna Sripada (1):
  drm/i915/xe3lpd: Add cdclk changes

Suraj Kandpal (5):
  drm/i915/xe3lpd: Add macro to choose HDCP_LINE_REKEY bit
  drm/i915/xe3lpd: Add C20 Phy consolidated programming table
  drm/i915/xe3lpd: Add new bit range of MAX swing setup
  drm/i915/xe3lpd: Add check to see if edp over type c is allowed
  drm/i915/xe3lpd: Add powerdown value of eDP over type c

 drivers/gpu/drm/i915/display/intel_alpm.c     |   2 +-
 drivers/gpu/drm/i915/display/intel_cdclk.c    |  56 +++++++-
 drivers/gpu/drm/i915/display/intel_cx0_phy.c  |  29 +++-
 .../drm/i915/display/intel_display_device.c   |   6 +
 .../drm/i915/display/intel_display_device.h   |   2 +
 .../i915/display/intel_display_power_map.c    | 135 +++++++++++++++++-
 .../drm/i915/display/intel_display_types.h    |   1 +
 drivers/gpu/drm/i915/display/intel_dp.c       |  16 +++
 drivers/gpu/drm/i915/display/intel_hdcp.c     |   5 +-
 drivers/gpu/drm/i915/display/intel_pmdemand.c |  61 +++++---
 drivers/gpu/drm/i915/display/intel_pmdemand.h |   4 +-
 drivers/gpu/drm/i915/display/intel_psr_regs.h |   4 +-
 drivers/gpu/drm/i915/display/skl_watermark.c  |  18 ++-
 drivers/gpu/drm/i915/i915_reg.h               |   6 +-
 include/drm/intel/i915_pciids.h               |  12 ++
 15 files changed, 319 insertions(+), 38 deletions(-)