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[v2,00/17] drm/i915/dmc_wl: Fixes and enablement for Xe3_LPD

Message ID 20241106215231.103474-1-gustavo.sousa@intel.com (mailing list archive)
Headers show
Series drm/i915/dmc_wl: Fixes and enablement for Xe3_LPD | expand

Message

Gustavo Sousa Nov. 6, 2024, 9:50 p.m. UTC 
Using the DMC wakelock is the official recommendation for Xe3_LPD. This
series apply fixes to the current DMC wakelock implementation and
enables it by default for Xe3_LPD. The series has been tested with a PTL
machine.

Gustavo Sousa (17):
  drm/i915/dmc_wl: Use i915_mmio_reg_offset() instead of reg.reg
  drm/xe: Mimic i915 behavior for non-sleeping MMIO wait
  drm/i915/dmc_wl: Use non-sleeping variant of MMIO wait
  drm/i915/dmc_wl: Check for non-zero refcount in release work
  drm/i915/dmc_wl: Get wakelock when disabling dynamic DC states
  drm/i915/dmc_wl: Use sentinel item for range tables
  drm/i915/dmc_wl: Extract intel_dmc_wl_reg_in_range()
  drm/i915/dmc_wl: Rename lnl_wl_range to powered_off_ranges
  drm/i915/dmc_wl: Track registers touched by the DMC
  drm/i915/dmc_wl: Allow simpler syntax for single reg in range tables
  drm/i915/dmc_wl: Deal with existing references when disabling
  drm/i915/dmc_wl: Couple enable/disable with dynamic DC states
  drm/i915/dmc_wl: Add and use HAS_DMC_WAKELOCK()
  drm/i915/dmc_wl: Init only after we have runtime device info
  drm/i915/dmc_wl: Use HAS_DMC() in HAS_DMC_WAKELOCK()
  drm/i915/dmc_wl: Sanitize enable_dmc_wl according to hardware support
  drm/i915/xe3lpd: Use DMC wakelock by default

 drivers/gpu/drm/i915/display/intel_de.h       |  10 +
 .../drm/i915/display/intel_display_device.h   |   1 +
 .../drm/i915/display/intel_display_driver.c   |   2 +-
 .../drm/i915/display/intel_display_params.c   |   6 +-
 .../drm/i915/display/intel_display_params.h   |   2 +-
 .../i915/display/intel_display_power_well.c   |  19 +-
 drivers/gpu/drm/i915/display/intel_dmc.c      |   4 -
 drivers/gpu/drm/i915/display/intel_dmc_wl.c   | 304 ++++++++++++++----
 drivers/gpu/drm/i915/display/intel_dmc_wl.h   |  13 +-
 .../drm/xe/compat-i915-headers/intel_uncore.h |  11 +-
 10 files changed, 296 insertions(+), 76 deletions(-)

Comments

Gustavo Sousa Nov. 7, 2024, 6:36 p.m. UTC | #1 
Quoting Patchwork (2024-11-06 19:46:38-03:00)
>== Series Details ==
>
>Series: drm/i915/dmc_wl: Fixes and enablement for Xe3_LPD (rev2)
>URL   : https://patchwork.freedesktop.org/series/140282/
>State : failure
>
>== Summary ==
>
>CI Bug Log - changes from CI_DRM_15648 -> Patchwork_140282v2
>====================================================
>
>Summary
>-------
>
>  **FAILURE**
>
>  Serious unknown changes coming with Patchwork_140282v2 absolutely need to be
>  verified manually.
>  
>  If you think the reported changes have nothing to do with the changes
>  introduced in Patchwork_140282v2, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
>  to document this new failure mode, which will reduce false positives in CI.
>
>  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140282v2/index.html
>
>Participating hosts (45 -> 43)
>------------------------------
>
>  Missing    (2): fi-snb-2520m bat-jsl-3 
>
>Possible new issues
>-------------------
>
>  Here are the unknown changes that may have been introduced in Patchwork_140282v2:
>
>### IGT changes ###
>
>#### Possible regressions ####
>
>  * igt@i915_module_load@load:
>    - fi-cfl-8109u:       [PASS][1] -> [DMESG-WARN][2]
>   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15648/fi-cfl-8109u/igt@i915_module_load@load.html
>   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140282v2/fi-cfl-8109u/igt@i915_module_load@load.html
>
>  * igt@i915_selftest@live:
>    - bat-twl-1:          [PASS][3] -> [INCOMPLETE][4] +1 other test incomplete
>   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15648/bat-twl-1/igt@i915_selftest@live.html
>   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140282v2/bat-twl-1/igt@i915_selftest@live.html
>    - fi-skl-6600u:       [PASS][5] -> [ABORT][6] +1 other test abort
>   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15648/fi-skl-6600u/igt@i915_selftest@live.html
>   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140282v2/fi-skl-6600u/igt@i915_selftest@live.html
>
>  * igt@i915_selftest@live@uncore:
>    - fi-glk-j4005:       [PASS][7] -> [ABORT][8] +1 other test abort
>   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15648/fi-glk-j4005/igt@i915_selftest@live@uncore.html
>   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140282v2/fi-glk-j4005/igt@i915_selftest@live@uncore.html
>
>  * igt@kms_busy@basic@flip:
>    - fi-cfl-8109u:       [PASS][9] -> [INCOMPLETE][10] +1 other test incomplete
>   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15648/fi-cfl-8109u/igt@kms_busy@basic@flip.html
>   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_140282v2/fi-cfl-8109u/igt@kms_busy@basic@flip.html


Some of the issues above are due to intel_dmc_wl_get() and
intel_dmc_wl_put() being called by MMIO functions before
intel_dmc_wl_init() was called. I posted a new version of the series to
address that issue.

--
Gustavo Sousa