[00/23] Use VRR timing generator for fixed refresh rate modes

Message

Nautiyal, Ankit K Nov. 11, 2024, 9:11 a.m. UTC

Even though the VRR timing generator (TG) is primarily used for
variable refresh rates, it can be used for fixed refresh rates as
well. For a fixed refresh rate the Flip Line and Vmax must be equal
(TRANS_VRR_FLIPLINE = TRANS_VRR_VMAX). Beyond that, there are some
dependencies between the VRR timings and the legacy timing generator
registers.

This series is an attempt to use VRR TG for fixed refresh rate.
For platforms XE2LPD+, always go with VRR timing generator for both fixed and
variable refresh rate cases.

Rev2:
-Added support from MTL+ and for HDMI too.
-Changed VRR VSYNC programming which is required for HDMI.
-Modified vrr compute config for bigjoiner case. (Still to be tested).

Rev3:
-Start support from XE2LPD+ as MTL needs a WA to have PSR +VRR (fixed
refresh rate)
-Add changes to enable PSR with VRR with fixed refresh rate.

Rev4:
-Addressed review comments from Mitul and rebased.

Rev5:
-Avoid MSA Ignore PAR timing enable bit for fixed refresh rate
with VRR TG.
-Skip VRR compute config for HDMI connected via DP-HDMI2.1 PCON.
-Print fixed_rr along with other VRR parameters in crtc state dump.
-Rebase

Rev6:
-Refactor VRR code to have distinct modes in which VRR timing generator
can be used: VRR, FIXED_RR, CMRR.
-Bring the cmmr attributes in vrr struct.
-Remove condition flipline > vmin for LNL.
-Account for vmax being 0 based while MSA vtotal being 1 based.

Ankit Nautiyal (23):
  drm/i915/vrr: Refactor VRR Timing Computation
  drm/i915/vrr: Simplify CMRR Enable Check in intel_vrr_get_config
  drm/i915/vrr: Introduce new field for VRR mode
  drm/i915/vrr: Fill VRR mode for CMRR and dynamic VRR
  drm/i915/vrr: Rename vrr.enable to vrr.tg_enable
  drm/i915/display: Absorb cmrr attributes into vrr
  drm/i915/display: Add vrr mode to crtc_state dump
  drm/i915/vrr: Remove condition flipline > vmin for LNL
  drm/i915/vrr: Compute vrr vsync if platforms support it
  drm/i915/dp: Avoid vrr compute config for HDMI sink
  drm/i915/dp: fix the Adaptive sync Operation mode for SDP
  drm/i915/hdmi: Use VRR Timing generator for HDMI
  drm/i915/vrr: Handle joiner with vrr
  drm/i915/display: Handle transcoder timings for joiner
  drm/i915/vrr: Introduce VRR mode Fixed RR
  drm/i915/vrr: Fill fixed refresh mode in vrr_get_compute_config
  drm/i915/display: Enable MSA Ignore Timing PAR only when in not
    fixed_rr mode
  drm/i915/dp: Set FAVT mode in DP SDP with fixed refresh rate
  drm/i915/vrr: Avoid sending PUSH when VRR TG is used with Fixed
    refresh rate
  drm/i915/display: Disable PSR before disabling VRR
  drm/i915/psr: Allow PSR for fixed refrsh rate with VRR TG
  drm/i915/vrr: Always use VRR timing generator for XE2LPD+
  drm/i915/display: Use VRR timings for XE2LPD+ in modeset sequence

 .../drm/i915/display/intel_crtc_state_dump.c  |   5 +-
 drivers/gpu/drm/i915/display/intel_ddi.c      |   2 +-
 drivers/gpu/drm/i915/display/intel_display.c  |  61 ++--
 .../drm/i915/display/intel_display_types.h    |  18 +-
 drivers/gpu/drm/i915/display/intel_dp.c       |  19 +-
 .../drm/i915/display/intel_dp_link_training.c |   8 +-
 drivers/gpu/drm/i915/display/intel_dsb.c      |   2 +-
 drivers/gpu/drm/i915/display/intel_hdmi.c     |   3 +
 .../drm/i915/display/intel_modeset_setup.c    |   2 +-
 drivers/gpu/drm/i915/display/intel_psr.c      |   5 +-
 drivers/gpu/drm/i915/display/intel_vblank.c   |   8 +-
 drivers/gpu/drm/i915/display/intel_vrr.c      | 271 +++++++++++++-----
 drivers/gpu/drm/i915/display/skl_watermark.c  |   2 +-
 13 files changed, 279 insertions(+), 127 deletions(-)