Show patches with: Submitter = None       |    State = Action Required       |   683 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
[4/6] drm/i915: Transform WaDisableGafsUnitClkGating into a simple reg write - 1 - --- 2017-09-07 oscar.mateo@intel.com New
[3/6] drm/i915: WaPushConstantDereferenceHoldDisable needs to modify a masked register - 1 - --- 2017-09-07 oscar.mateo@intel.com New
[2/6] drm/i915: Transform WaDisableI2mCycleOnWRPort into a simple reg write - 1 - --- 2017-09-07 oscar.mateo@intel.com New
[1/6] drm/i915: Transform WaInPlaceDecompressionHang into a simple reg write - 1 - --- 2017-09-07 oscar.mateo@intel.com New
[6/6] drm/i915: Transform WaDisablePooledEuLoadBalancingFix into a simple register write - - - --- 2017-09-07 oscar.mateo@intel.com New
[5/6] drm/i915: Transform WaDisableDynamicCreditSharing into a simple register write - - - --- 2017-09-07 oscar.mateo@intel.com New
[4/6] drm/i915: Transform WaDisableGafsUnitClkGating into a simple reg write - - - --- 2017-09-07 oscar.mateo@intel.com New
[3/6] drm/i915: WaPushConstantDereferenceHoldDisable needs to modify a masked register - - - --- 2017-09-07 oscar.mateo@intel.com New
[2/6] drm/i915: Transform WaDisableI2mCycleOnWRPort into a simple reg write - - - --- 2017-09-07 oscar.mateo@intel.com New
[1/6] drm/i915: Transform WaInPlaceDecompressionHang into a simple reg write - 1 - --- 2017-09-07 oscar.mateo@intel.com New
drm/i915: Transform WaInPlaceDecompressionHang to a simple reg write - - - --- 2017-09-06 oscar.mateo@intel.com New
drm/i915: Create vfuncs for the reset/enable/disable GuC functions - - - --- 2017-08-24 oscar.mateo@intel.com New
[2/2] drm/i915: Create vfuncs for the reset/enable/disable GuC functions - - - --- 2017-08-23 oscar.mateo@intel.com New
[1/2] drm/i915: Make some RPS functions static - - - --- 2017-08-23 oscar.mateo@intel.com New
drm/i915/cnl: WaPushConstantDereferenceHoldDisable - 1 - --- 2017-08-23 oscar.mateo@intel.com New
drm/i915/cnl: WaPushConstantDereferenceHoldDisable - 1 - --- 2017-08-23 oscar.mateo@intel.com New
drm/i915/cnl: WaPushConstantDereferenceHoldDisable - 1 - --- 2017-08-22 oscar.mateo@intel.com New
[v2] drm/i915/guc: Dump the GuC stage descriptor pool in debugfs - 1 - --- 2017-05-10 oscar.mateo@intel.com New
drm/i915/guc: Dump the GuC stage descriptor pool in debugfs - 1 - --- 2017-05-05 oscar.mateo@intel.com New
[RFC,2/2] drm/i915/guc: Rename has_guc to has_uc - - - --- 2017-05-05 oscar.mateo@intel.com New
[1/2] drm/i915/guc: Get rid of the enable_guc_loading module parameter 1 - - --- 2017-05-05 oscar.mateo@intel.com New
[RFC] tests/pm_sseu: Add subtest to verify UMD can configure render powerclock state - - - --- 2017-05-02 oscar.mateo@intel.com New
[RFC] benchmarks/gem_slice_shutdown: microbenchmark for slice shutdown delays - - - --- 2017-05-02 oscar.mateo@intel.com New
[RFC] drm/i915: Allow the UMD to configure their own power clock state - - - --- 2017-05-02 oscar.mateo@intel.com New
drm/i915: New vfunc prepare_request - - - --- 2017-04-28 oscar.mateo@intel.com New
tools/null_state_gen: Add GEN10 golden context batch buffer creation - - - --- 2017-04-28 oscar.mateo@intel.com New
drm/i915: Allow null render state batchbuffers bigger than one page - - - --- 2017-04-28 oscar.mateo@intel.com New
[2/2] tools/null_state_gen: Add GEN10 golden context batch buffer creation - - - --- 2017-04-28 oscar.mateo@intel.com New
[1/2] tools/null_state_gen: Automatically generate the copyright header - - - --- 2017-04-28 oscar.mateo@intel.com New
[v2] tests/pm_sseu: Re-enable the test - - - --- 2017-04-26 oscar.mateo@intel.com New
tests/pm_sseu: Re-enable the test - 1 - --- 2017-04-18 oscar.mateo@intel.com New
[v4] drm/i915: Use the engine class to get the context size - 1 - --- 2017-04-11 oscar.mateo@intel.com New
[5/5] drm/i915: Use the engine class to get the context size - 1 - --- 2017-04-10 oscar.mateo@intel.com New
[4/5] drm/i915: Split the engine info table in two levels, using class + instance - 2 - --- 2017-04-10 oscar.mateo@intel.com New
[3/5] drm/i915: Generate the engine name based on the instance number - 2 - --- 2017-04-10 oscar.mateo@intel.com New
[2/5] drm/i915: Use the same vfunc for BSD2 ring init - 1 - --- 2017-04-10 oscar.mateo@intel.com New
[1/5] drm/i915: Classify the engines in class + instance - 2 - --- 2017-04-10 oscar.mateo@intel.com New
[v5] drm/i915: Split the engine info table in two levels, using class + instance - 1 - --- 2017-04-07 oscar.mateo@intel.com New
[5/5] drm/i915: Use the engine class to get the context size - 1 - --- 2017-04-07 oscar.mateo@intel.com New
[4/5] drm/i915: Split the engine info table in two levels, using class + instance - - - --- 2017-04-07 oscar.mateo@intel.com New
[3/5] drm/i915: Generate the engine name based on the instance number - 2 - --- 2017-04-07 oscar.mateo@intel.com New
[2/5] drm/i915: Use the same vfunc for BSD2 ring init - 1 - --- 2017-04-07 oscar.mateo@intel.com New
[1/5] drm/i915: Classify the engines in class + instance - 2 - --- 2017-04-07 oscar.mateo@intel.com New
[5/5] drm/i915: Use the engine class to get the context size - 1 - --- 2017-04-06 oscar.mateo@intel.com New
[4/5] drm/i915: Split the engine info table in two levels, using class + instance - - - --- 2017-04-06 oscar.mateo@intel.com New
[3/5] drm/i915: Generate the engine name based on the instance number - 1 - --- 2017-04-06 oscar.mateo@intel.com New
[2/5] drm/i915: Use the same vfunc for BSD2 ring init - 1 - --- 2017-04-06 oscar.mateo@intel.com New
[1/5] drm/i915: Classify the engines in class + instance - 1 - --- 2017-04-06 oscar.mateo@intel.com New
[v3] drm/i915: Generate the engine name based on the instance number - - - --- 2017-04-06 oscar.mateo@intel.com New
[5/5] drm/i915: Use the engine class to get the context size - 1 - --- 2017-04-06 oscar.mateo@intel.com New
[4/5] drm/i915: Split the engine info table in two levels, using class + instance - - - --- 2017-04-06 oscar.mateo@intel.com New
[3/5] drm/i915: Generate the engine name based on the instance number - - - --- 2017-04-06 oscar.mateo@intel.com New
[2/5] drm/i915: Use the same vfunc for BSD2 ring init - 1 - --- 2017-04-06 oscar.mateo@intel.com New
[1/5] drm/i915: Classify the engines in class + instance - 1 - --- 2017-04-06 oscar.mateo@intel.com New
[5/5] drm/i915: Use the engine class to get the context size - - - --- 2017-04-05 oscar.mateo@intel.com New
[4/5] drm/i915: Split the engine info table in two levels, using class + instance - - - --- 2017-04-05 oscar.mateo@intel.com New
[3/5] drm/i915: Generate the engine name based on the instance number - - - --- 2017-04-05 oscar.mateo@intel.com New
[2/5] drm/i915: Use the same vfunc for BSD2 ring init - 1 - --- 2017-04-05 oscar.mateo@intel.com New
[1/5] drm/i915: Classify the engines in class + instance - 1 - --- 2017-04-05 oscar.mateo@intel.com New
drm/i915/guc: Take enable_guc_loading check out of GEM core code - 1 - --- 2017-03-28 oscar.mateo@intel.com New
[13/13] HAX Enable GuC loading & submission - - - --- 2017-03-22 oscar.mateo@intel.com New
[12/13] drm/i915/guc: Move guc_interrupts_release next to guc_interrupts_capture - 1 - --- 2017-03-22 oscar.mateo@intel.com New
[11/13] drm/i915/guc: Split out the mmio_white_list struct - 1 - --- 2017-03-22 oscar.mateo@intel.com New
[v3,10/13] drm/i915/guc: Refactor the concept "GuC context descriptor" into "GuC stage descriptor" - 1 - --- 2017-03-22 oscar.mateo@intel.com New
[v2,09/13] drm/i915/guc: A little bit more of doorbell sanitization - 1 - --- 2017-03-22 oscar.mateo@intel.com New
[v2,08/13] drm/i915/guc: Wait for doorbell to be inactive before deallocating - 2 - --- 2017-03-22 oscar.mateo@intel.com New
[v2,07/13] drm/i915/guc: Improve the GuC documentation & comments about proxy submissions - 1 - --- 2017-03-22 oscar.mateo@intel.com New
[v3,06/13] drm/i915/guc: Make intel_guc_send a function pointer - 1 - --- 2017-03-22 oscar.mateo@intel.com New
[v3,05/13] drm/i915/guc: Break out the GuC log extras into their own "runtime" struct - 2 - --- 2017-03-22 oscar.mateo@intel.com New
[04/13] drm/i915/guc: The Additional Data Struct (ADS) should get enabled together with GuC submiss… - 1 - --- 2017-03-22 oscar.mateo@intel.com New
[v4,03/13] drm/i915/guc: Add onion teardown to the GuC setup - 1 - --- 2017-03-22 oscar.mateo@intel.com New
[v5,02/13] drm/i915/guc: Keep the ctx_pool_vaddr mapped, for easy access - 2 - --- 2017-03-22 oscar.mateo@intel.com New
[v5,01/13] drm/i915/guc: Sanitize GuC client initialization - 1 - --- 2017-03-22 oscar.mateo@intel.com New
[12/12] drm/i915/guc: Move guc_interrupts_release next to guc_interrupts_capture - 1 - --- 2017-03-21 oscar.mateo@intel.com New
[11/12] drm/i915/guc: Split out the mmio_white_list struct - 1 - --- 2017-03-21 oscar.mateo@intel.com New
[10/12] drm/i915/guc: Refactor the concept "GuC context descriptor" into "GuC stage descriptor" - 1 - --- 2017-03-21 oscar.mateo@intel.com New
[09/12] drm/i915/guc: A little bit more of doorbell sanitization - 1 - --- 2017-03-21 oscar.mateo@intel.com New
[08/12] drm/i915/guc: Wait for doorbell to be inactive before deallocating - 2 - --- 2017-03-21 oscar.mateo@intel.com New
[07/12] drm/i915/guc: Improve the GuC documentation & comments about proxy submissions - 1 - --- 2017-03-21 oscar.mateo@intel.com New
[06/12] drm/i915/guc: Make intel_guc_send a function pointer - 1 - --- 2017-03-21 oscar.mateo@intel.com New
[05/12] drm/i915/guc: Break out the GuC log extras into their own "runtime" struct - 2 - --- 2017-03-21 oscar.mateo@intel.com New
[04/12] drm/i915/guc: The Additional Data Struct (ADS) should get enabled together with GuC submiss… - 1 - --- 2017-03-21 oscar.mateo@intel.com New
[03/12] drm/i915/guc: Add onion teardown to the GuC setup - 1 - --- 2017-03-21 oscar.mateo@intel.com New
[02/12] drm/i915/guc: Keep the ctx_pool_vaddr mapped, for easy access - 2 - --- 2017-03-21 oscar.mateo@intel.com New
[01/12] drm/i915/guc: Sanitize GuC client initialization - 1 - --- 2017-03-21 oscar.mateo@intel.com New
[10/11] drm/i915/guc: Refactor the concept "GuC context descriptor" into "GuC stage descriptor" - - - --- 2017-03-10 oscar.mateo@intel.com New
[09/11] drm/i915/guc: A little bit more of doorbell sanitization - 1 - --- 2017-03-10 oscar.mateo@intel.com New
[08/11] drm/i915/guc: Wait for doorbell to be inactive before deallocating - - - --- 2017-03-10 oscar.mateo@intel.com New
[07/11] drm/i915/guc: Improve the GuC documentation & comments about proxy submissions - - - --- 2017-03-10 oscar.mateo@intel.com New
[06/11,v3] drm/i915/guc: Make intel_guc_send a function pointer - 1 - --- 2017-03-10 oscar.mateo@intel.com New
[05/11,v2] drm/i915/guc: Break out the GuC log extras into their own "runtime" struct - 2 - --- 2017-03-10 oscar.mateo@intel.com New
[04/11,v2] drm/i915/guc: s/ads_vma/addon - 1 - --- 2017-03-10 oscar.mateo@intel.com New
[03/11,v3] drm/i915/guc: Add onion teardown to the GuC setup - 1 - --- 2017-03-10 oscar.mateo@intel.com New
[02/11,v3] drm/i915/guc: Keep the ctx_pool_vaddr mapped, for easy access - 2 - --- 2017-03-10 oscar.mateo@intel.com New
[01/11,v3] drm/i915/guc: Sanitize GuC client initialization - 1 - --- 2017-03-10 oscar.mateo@intel.com New
[RFC] drm/i915/guc: Smurf the GuC context - - - --- 2017-02-24 oscar.mateo@intel.com New
[4/4] drm/i915/guc: Break out the GuC log "extras" - 1 - --- 2017-02-24 oscar.mateo@intel.com New
[3/4] drm/i915/guc: s/ads_vma/addon - 1 - --- 2017-02-24 oscar.mateo@intel.com New
[2/4,v2] drm/i915/guc: Add onion teardown to the GuC setup - 1 - --- 2017-02-24 oscar.mateo@intel.com New
[1/4,v3] drm/i915/guc: Keep the ctx_pool_vaddr mapped, for easy access - 2 - --- 2017-02-24 oscar.mateo@intel.com New
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