Show patches with: Submitter = Xiang, Haihao       |   73 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[Intel,gfx,i-g-t,4/4] Revert "gen8 rendercpy: temporarily disable" - - - --- 2013-12-06 Xiang, Haihao New
[Intel,gfx,i-g-t,3/4] rendercopy/bdw: A workaround for 3D pipeline - - - --- 2013-12-06 Xiang, Haihao New
[Intel,gfx,i-g-t,2/4] rendercopy/bdw: Set Instruction Buffer size Modify Enable to 1 - - - --- 2013-12-06 Xiang, Haihao New
[Intel,gfx,i-g-t,1/4] lib: Clean the batch buffer store after reset - - - --- 2013-12-06 Xiang, Haihao New
[Intel,gfx,assembler,i-g-t] assembler/bdw: Update write(...) - - - --- 2013-12-06 Xiang, Haihao New
[Intel,gfx,i-g-t,(v3),4/4] tests/gem_media_fill: the assembly code for the shader used in the case - - - --- 2013-12-06 Xiang, Haihao New
[Intel,gfx,i-g-t,(v3),3/4] tests/gem_media_fill: add support for gen7 - - - --- 2013-12-06 Xiang, Haihao New
[Intel,gfx,i-g-t,(v3),2/4] tests/gem_media_fill: add support for gen8 - - - --- 2013-12-06 Xiang, Haihao New
[Intel,gfx,i-g-t,(v3),1/4] tests: add gem_media_fill - - - --- 2013-12-06 Xiang, Haihao New
[Intel,gfx,i-g-t,(v2),4/4] tests/gem_media_fill: the assembly code for the shader used in the case - - - --- 2013-12-02 Xiang, Haihao New
[Intel,gfx,i-g-t,(v2),3/4] tests/gem_media_fill: add support for gen7 - - - --- 2013-12-02 Xiang, Haihao New
[Intel,gfx,i-g-t,(v2),2/4] tests/gem_media_fill: add support for gen8 - - - --- 2013-12-02 Xiang, Haihao New
[Intel,gfx,i-g-t,(v2),1/4] tests: add gem_media_fill - - - --- 2013-12-02 Xiang, Haihao New
[Intel,gfx,i-g-t,4/4] tests/gem_media_fill: the assembly code for the shader used in the case - - - --- 2013-11-29 Xiang, Haihao New
[Intel,gfx,i-g-t,3/4] tests/gem_media_fill: add support for gen7 - - - --- 2013-11-29 Xiang, Haihao New
[Intel,gfx,i-g-t,2/4] tests/gem_media_fill: add support for gen8 - - - --- 2013-11-29 Xiang, Haihao New
[Intel,gfx,i-g-t,1/4] tests: add gem_media_fill - - - --- 2013-11-29 Xiang, Haihao New
[i-g-t,PATH] debugger: Include path for cairo to fix compiler error - - - --- 2013-02-28 Xiang, Haihao New
[2/2] gem_ring_sync_loop: test the new ring - - - --- 2012-11-15 Xiang, Haihao New
[1/2] gem_ring_sync_loop: check the rings supported by the kernel - - - --- 2012-11-15 Xiang, Haihao New
[2/2] Update gem_ring_sync_loop to support VEBOX ring (the 4th ring) on Haswell - - - --- 2012-11-14 Xiang, Haihao New
[1/2] tests: storedw on VEBOX - - - --- 2012-11-14 Xiang, Haihao New
[2/2] intel: Add support for VEBOX ring (v2) - - - --- 2012-11-14 Xiang, Haihao New
[1/2] intel: Sync the parameter of i915_getparma with the kernel - - - --- 2012-11-14 Xiang, Haihao New
[5/5] Xv: set up pipeline for Xv on Ivybridge - - - --- 2011-06-22 Xiang, Haihao New
[4/5] Xv: upload new shaders to GEM objects for Xv on Ivybridge - - - --- 2011-06-22 Xiang, Haihao New
[3/5] Xv: update SURFACE_STATE & SAMPLER_STATE for Xv on Ivybridge - - - --- 2011-06-22 Xiang, Haihao New
[2/5] Xv: New shaders for Xv on Ivybridge - - - --- 2011-06-22 Xiang, Haihao New
[1/5] Xv: separate fragments from M4 macros - - - --- 2011-06-22 Xiang, Haihao New
[5/5] render: use headerless render target write - - - --- 2010-11-01 Xiang, Haihao New
[4/5] render: acceleration for composite on Sandybridge - - - --- 2010-11-01 Xiang, Haihao New
[3/5] render: fragments for composite on Sandybridge - - - --- 2010-11-01 Xiang, Haihao New
[2/5] render: fix send instruction used in sampling fragments - - - --- 2010-11-01 Xiang, Haihao New
[1/5] render: set the surface state base address - - - --- 2010-11-01 Xiang, Haihao New
[PATH,v2,6/6] Xv: don't call intel_wait_for_scanline on Sandybridge - - - --- 2010-10-27 Xiang, Haihao New
[PATH,v2,5/6] Xv: enable TextureAdaptor for Sandybridge - - - --- 2010-10-27 Xiang, Haihao New
[PATH,v2,4/6] Xv: setup pipeline for Xv on Sandybridge - - - --- 2010-10-27 Xiang, Haihao New
[PATH,v2,3/6] Xv: fragments for xv on Sandybridge. - - - --- 2010-10-27 Xiang, Haihao New
[PATH,v2,2/6] Xv: Send instruction doesn't use implied move when sampling YUV surface - - - --- 2010-10-27 Xiang, Haihao New
[PATH,v2,1/6] Xv: set the surface state base address - - - --- 2010-10-27 Xiang, Haihao New
[6/6] Xv: don't call intel_wait_for_scanline on Sandybridge - - - --- 2010-10-21 Xiang, Haihao New
[5/6] Xv: enable TextureAdaptor for Sandybridge - - - --- 2010-10-21 Xiang, Haihao New
[4/6] Xv: setup pipeline for Xv on Sandybridge - - - --- 2010-10-21 Xiang, Haihao New
[3/6] Xv: fragments for xv on Sandybridge. - - - --- 2010-10-21 Xiang, Haihao New
[2/6] Xv: Send instruction doesn't use implied move when sampling YUV surface - - - --- 2010-10-21 Xiang, Haihao New
[1/6] Xv: set the surface state base address - - - --- 2010-10-21 Xiang, Haihao New
[10/10] no compression flag on Sandybridge - - - --- 2010-10-09 Xiang, Haihao New
[09/10] print error message when using math function on Sandybridge. - - - --- 2010-10-09 Xiang, Haihao New
[08/10] sampler, urb write, null and gateway on Sandybridge are same as Ironlake. - - - --- 2010-10-09 Xiang, Haihao New
[07/10] add support for data port read on Sandybridge - - - --- 2010-10-09 Xiang, Haihao New
[06/10] add support for data port write on Sandybridge. - - - --- 2010-10-09 Xiang, Haihao New
[05/10] fix send instruction on Sandybridge - - - --- 2010-10-09 Xiang, Haihao New
[04/10] add AccWrCtrl flag on Sandybridge - - - --- 2010-10-09 Xiang, Haihao New
[03/10] always set destination horiz stride for Align16 to 1 on Sandybridge. - - - --- 2010-10-09 Xiang, Haihao New
[02/10] fix jump count for Sandybridge. - - - --- 2010-10-09 Xiang, Haihao New
[01/10] add -g 6 for Sandybridge - - - --- 2010-10-09 Xiang, Haihao New
[Inter-gfx,v3,4/4] drm/i915: add a new ring buffer on Sandybridge - - - --- 2010-09-16 Xiang, Haihao New
[Inter-gfx,v3,3/4] drm/i915: add set_tail hook in struct intel_ring_buffer - - - --- 2010-09-16 Xiang, Haihao New
[Inter-gfx,v3,2/4] drm/i915: do not export the instances of struct intel_ring_buffer - - - --- 2010-09-16 Xiang, Haihao New
[Inter-gfx,v3,1/4] drm/i915: fix HAS_BSD with a device info flag - - - --- 2010-09-16 Xiang, Haihao New
[v2,2/2] drm/i95: Add a new ring buffer on Sandybridge - - - --- 2010-09-13 Xiang, Haihao New
[v2,1/2] drm/i915: prepare for video codec ring buffer on Sandybridge - - - --- 2010-09-13 Xiang, Haihao New
[2/2] drm/i915: Add a new ring buffer on Sandybridge - - - --- 2010-09-02 Xiang, Haihao New
[1/2] drm/i915: prepare for video codec ring buffer on Sandybridge - - - --- 2010-09-02 Xiang, Haihao New
intel: add a new interface drm_intel_bo_alloc_direct - - - --- 2010-05-25 Xiang, Haihao Deferred
intel_gpu_dump: add support for IGDNG - - - --- 2009-09-03 Xiang, Haihao Not Applicable
intel_gpu_dump: Fix the length of CONSTANT_BUFFER - - - --- 2009-09-02 Xiang, Haihao Not Applicable
intel_gpu_dump: add support for IGDNG - - - --- 2009-09-02 Xiang, Haihao Not Applicable
intel_gpu_dump: add support for IGDNG - - - --- 2009-09-02 Xiang, Haihao Not Applicable
intel_gpu_dump: CS FENCE in URB_FENCE is 11-bits wide - - - --- 2009-09-02 Xiang, Haihao Not Applicable
intel_gpu_dump: Fix the length of CONSTANT_BUFFER - - - --- 2009-09-02 Xiang, Haihao Not Applicable
intel-gen4asm: add intel-gen4asm.pc.in - - - --- 2009-07-22 Xiang, Haihao Not Applicable
XvMC: pin XvMC buffers under KMS. - - - --- 2009-07-22 Xiang, Haihao Not Applicable