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Apply
«
1
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Patch
Series
A/R/T
S/W/F
Date
Submitter
Delegate
State
[v3,2/2] drm/i915: Render decompression support for Gen9 and above
- - -
-
-
-
2016-05-13
vandana.kannan@intel.com
New
[v2,2/2] drm/i915: Render decompression support for Gen9 and above
- - -
-
-
-
2016-04-29
vandana.kannan@intel.com
New
[v3] drm/i915: BXT DDI PHY sequence BUN
1 1 -
-
-
-
2016-03-31
vandana.kannan@intel.com
New
[v2] drm/i915: BXT DDI PHY sequence BUN
- - -
-
-
-
2016-03-31
vandana.kannan@intel.com
New
drm/i915: BXT DDI PHY sequence BUN
- - -
-
-
-
2016-03-21
vandana.kannan@intel.com
New
[2/2] drm/i915: Render decompression support for Gen9 and above
- - -
-
-
-
2016-03-18
vandana.kannan@intel.com
New
[1/2] drm: Add aux plane verification in addFB2
- - -
-
-
-
2016-03-18
vandana.kannan@intel.com
New
[RFC,2/2] drm/i915: Render decompression support for Gen9
- - -
-
-
-
2015-12-09
vandana.kannan@intel.com
New
[RFC,1/2] drm: Add aux plane verification in addFB2
- - -
-
-
-
2015-12-09
vandana.kannan@intel.com
New
drm/i915: Fix mode_get() for Broxton
- - -
-
-
-
2015-12-02
vandana.kannan@intel.com
New
drm: Add aux plane verification in addFB2
- - -
-
-
-
2015-11-05
vandana.kannan@intel.com
New
drm: Add aux plane verification in addFB2
- - -
-
-
-
2015-11-02
vandana.kannan@intel.com
New
[2/2] drm/i915: Add crtc_clock_get for hsw, skl, bxt
- - -
-
-
-
2015-10-15
vandana.kannan@intel.com
New
[1/2] drm/i915: Create crtc_clock_get function pointers
- - -
-
-
-
2015-10-15
vandana.kannan@intel.com
New
[RFC] drm/i915: Render decompression support for Gen9 and above
- - -
-
-
-
2015-09-04
vandana.kannan@intel.com
New
[RFC] drm/i915: Add gen check for fb size
- - -
-
-
-
2015-07-10
vandana.kannan@intel.com
New
drm/i915: Parsing LFP brightness control from VBT
- - 1
-
-
-
2015-07-06
vandana.kannan@intel.com
New
[v3] drm/i915/bxt: BUNs related to port PLL
- 2 1
-
-
-
2015-07-01
vandana.kannan@intel.com
New
[v2] drm/i915/bxt: BUNs related to port PLL
- - 1
-
-
-
2015-07-01
vandana.kannan@intel.com
New
drm/i915/bxt: BUNs related to port PLL
- - 1
-
-
-
2015-07-01
vandana.kannan@intel.com
New
drm/i915/bxt: Calculate port clock
- - 1
-
-
-
2015-06-30
vandana.kannan@intel.com
New
[v5] drm/i915/bxt: eDP Panel Power sequencing
- 1 -
-
-
-
2015-06-18
vandana.kannan@intel.com
New
[v4] drm/i915/bxt: eDP Panel Power sequencing
- - -
-
-
-
2015-06-12
vandana.kannan@intel.com
New
[v4] drm/i915/bxt: eDP Panel Power sequencing
- - 1
-
-
-
2015-05-13
vandana.kannan@intel.com
New
[v2,2/2] drm/i915/bxt: Move around lane stagger calculation
- 1 -
-
-
-
2015-05-13
vandana.kannan@intel.com
New
[v3,1/2] drm/i915/bxt: Port PLL programming BUN
- 2 -
-
-
-
2015-05-13
vandana.kannan@intel.com
New
[v3] drm/i915/bxt: eDP Panel Power sequencing
- - 1
-
-
-
2015-05-07
vandana.kannan@intel.com
New
[2/2] drm/i915/bxt: Move around lane stagger calculation
- - 1
-
-
-
2015-05-07
vandana.kannan@intel.com
New
[v2,1/2] drm/i915/bxt: Port PLL programming BUN
- 1 -
-
-
-
2015-05-07
vandana.kannan@intel.com
New
drm/i915/bxt: BLC implementation
- 1 1
-
-
-
2015-05-05
vandana.kannan@intel.com
New
drm/i915/bxt: Port PLL programming BUN
- 1 1
-
-
-
2015-05-04
vandana.kannan@intel.com
New
drm/i915: eDP Panel Power sequencing
- - 1
-
-
-
2015-05-04
vandana.kannan@intel.com
New
[3/3] drm/i915: eDP Panel Power sequencing add PPS reg set
- - -
-
-
-
2015-04-30
vandana.kannan@intel.com
New
[2/3] drm/i915: eDP Panel Power sequencing PP_DIV register changes
- - -
-
-
-
2015-04-30
vandana.kannan@intel.com
New
[1/3] drm/i915: eDP Panel Power sequencing modify use of HAS_PCH_SPLIT
- - -
-
-
-
2015-04-30
vandana.kannan@intel.com
New
[10/10] kms_drrs: Test DRRS entry and exit
- - -
-
-
-
2015-01-09
vandana.kannan@intel.com
New
[9/10] drm/i915: Add debugfs entry for DRRS
- - -
-
-
-
2015-01-09
vandana.kannan@intel.com
New
[8/10] Documentation/drm: DocBook integration for DRRS
- - -
-
-
-
2015-01-09
vandana.kannan@intel.com
New
[7/10] drm/i915: Enable eDP DRRS for CHV
- - -
-
-
-
2015-01-09
vandana.kannan@intel.com
New
[6/10] drm/i915: Support for RR switching on VLV
- - -
-
-
-
2015-01-09
vandana.kannan@intel.com
New
[5/10] drm/i915/bdw: Add support for DRRS to switch RR
- - -
-
-
-
2015-01-09
vandana.kannan@intel.com
New
[4/10] drm/i915: DRRS calls based on frontbuffer
- - -
-
-
-
2015-01-09
vandana.kannan@intel.com
New
[3/10] drm/i915: Enable/disable DRRS
- - -
-
-
-
2015-01-09
vandana.kannan@intel.com
New
[2/10] drm/i915: Initialize DRRS delayed work
- - -
-
-
-
2015-01-09
vandana.kannan@intel.com
New
[1/10] drm/i915: Modifying structures related to DRRS
- - -
-
-
-
2015-01-09
vandana.kannan@intel.com
New
[7/7] drm/i915: Enable eDP DRRS for CHV
- - -
-
-
-
2014-12-18
vandana.kannan@intel.com
New
[6/7] drm/i915: Support for RR switching on VLV
- - -
-
-
-
2014-12-18
vandana.kannan@intel.com
New
[5/7] drm/i915/bdw: Add support for DRRS to switch RR
- - -
-
-
-
2014-12-18
vandana.kannan@intel.com
New
[4/7] drm/i915: DRRS calls based on frontbuffer
- - -
-
-
-
2014-12-18
vandana.kannan@intel.com
New
[3/7] drm/i915: Enable/disable DRRS
- - -
-
-
-
2014-12-18
vandana.kannan@intel.com
New
[2/7] drm/i915: Initialize DRRS delayed work
- - -
-
-
-
2014-12-18
vandana.kannan@intel.com
New
[1/7] drm/i915: Modifying structures related to DRRS
- - -
-
-
-
2014-12-18
vandana.kannan@intel.com
New
drm/i915: Parsing logic for the Mipi sequence block
- - -
-
-
-
2014-12-16
vandana.kannan@intel.com
New
drm/i915: Parsing LFP brightness control from VBT
- - -
-
-
-
2014-12-15
vandana.kannan@intel.com
New
[8/8] drm/i915: Add drrs_interval module parameter
- - -
-
-
-
2014-12-10
vandana.kannan@intel.com
New
[7/8] drm/i915: Enable eDP DRRS for CHV
- - -
-
-
-
2014-12-10
vandana.kannan@intel.com
New
[6/8] drm/i915: Support for RR switching on VLV
- - -
-
-
-
2014-12-10
vandana.kannan@intel.com
New
[5/8] drm/i915/bdw: Add support for DRRS to switch RR
- - -
-
-
-
2014-12-10
vandana.kannan@intel.com
New
[4/8] drm/i915: DRRS calls based on frontbuffer
- - -
-
-
-
2014-12-10
vandana.kannan@intel.com
New
[3/8] drm/i915: Enable/disable DRRS
- - -
-
-
-
2014-12-10
vandana.kannan@intel.com
New
[2/8] drm/i915: Initialize DRRS delayed work
- - -
-
-
-
2014-12-10
vandana.kannan@intel.com
New
[1/8] drm/i915: Modifying structures related to DRRS
- - -
-
-
-
2014-12-10
vandana.kannan@intel.com
New
[2/2] drm/i915: Add generic i2c mipi parsing
- - -
-
-
-
2014-12-07
vandana.kannan@intel.com
New
[1/2] drm/i915: Parsing Backlight-ON, Backlight-OFF, and Tear-On sequence.
- - -
-
-
-
2014-12-07
vandana.kannan@intel.com
New
[3/3] drm/i915: Splitting PPS functions based on platform
- - -
-
-
-
2014-11-10
vandana.kannan@intel.com
New
[2/3] drm/i915: Use vlv_power_sequencer_pipe() only to get pipe
- - -
-
-
-
2014-11-10
vandana.kannan@intel.com
New
[1/3] drm/i915: Move PPS calls to edp_init
- - -
-
-
-
2014-11-10
vandana.kannan@intel.com
New
[RFC,7/7] drm/i915: Modify refs to intel dp timestamps
- - -
-
-
-
2014-10-20
vandana.kannan@intel.com
New
[RFC,6/7] drm/i915: Replace all refs to intel_dp delays
- - -
-
-
-
2014-10-20
vandana.kannan@intel.com
New
[RFC,5/7] drm/i915: Split PPS reg write func based on platform
- - -
-
-
-
2014-10-20
vandana.kannan@intel.com
New
[RFC,4/7] drm/i915: Program PPS registers
- - -
-
-
-
2014-10-20
vandana.kannan@intel.com
New
[RFC,3/7] drm/i915: Split PPS setup code based on platform
- - -
-
-
-
2014-10-20
vandana.kannan@intel.com
New
[RFC,2/7] drm/i915: Setup PPS in intel_panel
- - -
-
-
-
2014-10-20
vandana.kannan@intel.com
New
[RFC,1/7] drm/i915: Move around funcs related to eDP PPS
- - -
-
-
-
2014-10-20
vandana.kannan@intel.com
New
[RFC,6/6] drm/i915: Modify refs to intel dp timestamps
- - -
-
-
-
2014-10-07
vandana.kannan@intel.com
New
[RFC,5/6] drm/i915: Replace all refs to intel_dp delays
- - -
-
-
-
2014-10-07
vandana.kannan@intel.com
New
[RFC,4/6] drm/i915: Removing refs to intel_dp_panel_power_sequencer
- - -
-
-
-
2014-10-07
vandana.kannan@intel.com
New
[RFC,3/6] drm/i915: Program PPS registers
- - -
-
-
-
2014-10-07
vandana.kannan@intel.com
New
[RFC,2/6] drm/i915: Define PPS setup functions
- - -
-
-
-
2014-10-07
vandana.kannan@intel.com
New
[RFC,1/6] drm/i915: Create PPS related struct and func pointers
- - -
-
-
-
2014-10-07
vandana.kannan@intel.com
New
[RFC,6/6] drm/i915: Support for RR switching on VLV
- - -
-
-
-
2014-09-12
vandana.kannan@intel.com
New
[RFC,5/6] drm/i915/bdw: Add support for DRRS to switch RR
- - -
-
-
-
2014-09-12
vandana.kannan@intel.com
New
[RFC,4/6] drm/i915: DRRS calls based on frontbuffer
- - -
-
-
-
2014-09-12
vandana.kannan@intel.com
New
[RFC,3/6] drm/i915: Enable/disable DRRS
- - -
-
-
-
2014-09-12
vandana.kannan@intel.com
New
[RFC,2/6] drm/i915: Initialize DRRS delayed work
- - -
-
-
-
2014-09-12
vandana.kannan@intel.com
New
[RFC,1/6] drm/i915: Modifying structures related to DRRS
- - -
-
-
-
2014-09-12
vandana.kannan@intel.com
New
drm/i915: Idleness detection for DRRS
- - -
-
-
-
2014-08-07
vandana.kannan@intel.com
New
[3/3] drm/i915: Program PFI credits for VLV
- - -
-
-
-
2014-08-07
vandana.kannan@intel.com
New
[v2,2/3] drm/i915: Get CZ clock for VLV
- - -
-
-
-
2014-08-07
vandana.kannan@intel.com
New
[1/3] drm/i915: Renaming CCK related reg definitions
- - -
-
-
-
2014-08-07
vandana.kannan@intel.com
New
[2/2] drm/i915: Program PFI credits for VLV
- - -
-
-
-
2014-08-04
vandana.kannan@intel.com
New
[1/2] drm/i915: Get CZ clock for VLV
- - -
-
-
-
2014-08-04
vandana.kannan@intel.com
New
[v8,2/2] drm/i915: State readout and cross-checking for dp_m2_n2
- - -
-
-
-
2014-07-11
vandana.kannan@intel.com
New
[v4,1/2] drm/i915: Set M2_N2 registers during mode set
- - -
-
-
-
2014-07-11
vandana.kannan@intel.com
New
[2/2] drm/i915: State readout and cross-checking for dp_m2_n2
- - -
-
-
-
2014-07-07
vandana.kannan@intel.com
New
[1/2] drm/i915: Set M2_N2 registers during mode set
- - -
-
-
-
2014-07-07
vandana.kannan@intel.com
New
[v7,2/2] drm/i915: State readout and cross-checking for dp_m2_n2
- - -
-
-
-
2014-06-23
vandana.kannan@intel.com
New
[v3,1/2] drm/i915: Set M2_N2 registers during mode set
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2014-06-23
vandana.kannan@intel.com
New
[v6,2/2] drm/i915: State readout and cross-checking for dp_m2_n2
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2014-06-18
vandana.kannan@intel.com
New
[v2,1/2] drm/i915: Set M2_N2 registers during mode set
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2014-06-18
vandana.kannan@intel.com
New
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