From patchwork Mon Aug 24 04:57:57 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: sonika.jindal@intel.com X-Patchwork-Id: 7060621 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 57675C05AC for ; Mon, 24 Aug 2015 04:58:07 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 768AE2037F for ; Mon, 24 Aug 2015 04:58:06 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id D90D72034A for ; Mon, 24 Aug 2015 04:58:04 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0546A6E13D; Sun, 23 Aug 2015 21:58:03 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTP id 4746B6E13D for ; Sun, 23 Aug 2015 21:58:02 -0700 (PDT) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga103.jf.intel.com with ESMTP; 23 Aug 2015 21:58:01 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.15,736,1432623600"; d="scan'208";a="789642501" Received: from pgsmsx108.gar.corp.intel.com ([10.221.44.103]) by orsmga002.jf.intel.com with ESMTP; 23 Aug 2015 21:58:01 -0700 Received: from bgsmsx151.gar.corp.intel.com (10.224.48.42) by PGSMSX108.gar.corp.intel.com (10.221.44.103) with Microsoft SMTP Server (TLS) id 14.3.224.2; Mon, 24 Aug 2015 12:57:59 +0800 Received: from bgsmsx104.gar.corp.intel.com ([169.254.5.127]) by BGSMSX151.gar.corp.intel.com ([169.254.3.240]) with mapi id 14.03.0224.002; Mon, 24 Aug 2015 10:27:57 +0530 From: "Jindal, Sonika" To: "Vivi, Rodrigo" , "intel-gfx@lists.freedesktop.org" Thread-Topic: [PATCH] drm/i915: Use dpcd read wake for sink crc calls. Thread-Index: AQHQ252DWUQh2BrGPkWSXZT9v1VykZ4VKwCAgAVwCAA= Date: Mon, 24 Aug 2015 04:57:57 +0000 Message-ID: <000C66961D35964B9714611E548C10AD0C2A0A4E@BGSMSX104.gar.corp.intel.com> References: <1440112320-21884-1-git-send-email-rodrigo.vivi@intel.com> <1440113007-22615-1-git-send-email-rodrigo.vivi@intel.com> In-Reply-To: <1440113007-22615-1-git-send-email-rodrigo.vivi@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.223.10.10] MIME-Version: 1.0 Subject: Re: [Intel-gfx] [PATCH] drm/i915: Use dpcd read wake for sink crc calls. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP So, sink crc during psr works now? Great, I will give a try with this patch.. Regards, Sonika -----Original Message----- From: Vivi, Rodrigo Sent: Friday, August 21, 2015 4:53 AM To: intel-gfx@lists.freedesktop.org Cc: Vivi, Rodrigo; Antognolli, Rafael; Jindal, Sonika Subject: [PATCH] drm/i915: Use dpcd read wake for sink crc calls. Let's use a native read with retry as suggested per spec to fix Sink CRC on SKL when PSR is enabled. With PSR enabled panel is probably taking more time to wake and dpcd read is faling. v2: Fix my email domain on commit message. Thanks Rafael. Cc: Rafael Antognolli Cc: Sonika Jindal Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/i915/intel_dp.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) -- 2.4.3 diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index d32ce48..34f5e33 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -4037,7 +4037,8 @@ static int intel_dp_sink_crc_stop(struct intel_dp *intel_dp) u8 buf; int ret = 0; - if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK, &buf) < 0) { + if (intel_dp_dpcd_read_wake(&intel_dp->aux, DP_TEST_SINK, + &buf, 1) < 0) { DRM_DEBUG_KMS("Sink CRC couldn't be stopped properly\n"); ret = -EIO; goto out; @@ -4069,7 +4070,8 @@ static int intel_dp_sink_crc_start(struct intel_dp *intel_dp) return ret; } - if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, &buf) < 0) + if (intel_dp_dpcd_read_wake(&intel_dp->aux, DP_TEST_SINK_MISC, + &buf, 1) < 0) return -EIO; if (!(buf & DP_TEST_CRC_SUPPORTED)) @@ -4077,7 +4079,7 @@ static int intel_dp_sink_crc_start(struct intel_dp *intel_dp) intel_dp->sink_crc.last_count = buf & DP_TEST_COUNT_MASK; - if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK, &buf) < 0) + if (intel_dp_dpcd_read_wake(&intel_dp->aux, DP_TEST_SINK, &buf, 1) < +0) return -EIO; hsw_disable_ips(intel_crtc); @@ -4109,8 +4111,8 @@ int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc) do { intel_wait_for_vblank(dev, intel_crtc->pipe); - if (drm_dp_dpcd_readb(&intel_dp->aux, - DP_TEST_SINK_MISC, &buf) < 0) { + if (intel_dp_dpcd_read_wake(&intel_dp->aux, + DP_TEST_SINK_MISC, &buf, 1) < 0) { ret = -EIO; goto stop; } @@ -4123,7 +4125,8 @@ int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc) if (count == 0) intel_dp->sink_crc.last_count = 0; - if (drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_CRC_R_CR, crc, 6) < 0) { + if (intel_dp_dpcd_read_wake(&intel_dp->aux, DP_TEST_CRC_R_CR, + crc, 6) < 0) { ret = -EIO; goto stop; }