From patchwork Thu Sep 10 07:45:49 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhao, Yakui" X-Patchwork-Id: 46700 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n8AN30uc022068 for ; Thu, 10 Sep 2009 23:03:00 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7637FA08B0; Thu, 10 Sep 2009 00:46:05 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 6941E9E77A for ; Thu, 10 Sep 2009 00:46:02 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP; 10 Sep 2009 00:42:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.44,363,1249282800"; d="scan'208";a="492152321" Received: from yakui_zhao.sh.intel.com (HELO localhost.localdomain) ([10.239.13.106]) by fmsmga002.fm.intel.com with ESMTP; 10 Sep 2009 00:38:20 -0700 From: yakui.zhao@intel.com To: eric@anholt.net Date: Thu, 10 Sep 2009 15:45:49 +0800 Message-Id: <1252568749-26949-4-git-send-email-yakui.zhao@intel.com> X-Mailer: git-send-email 1.5.4.5 In-Reply-To: <1252568749-26949-3-git-send-email-yakui.zhao@intel.com> References: <1252568749-26949-1-git-send-email-yakui.zhao@intel.com> <1252568749-26949-2-git-send-email-yakui.zhao@intel.com> <1252568749-26949-3-git-send-email-yakui.zhao@intel.com> Cc: intel-gfx@lists.freedesktop.org Subject: [Intel-gfx] [Patch 4/4] drm/I915: Write zero to DPLL_MD Reg for non-SDVO output X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.9 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org From: Zhao Yakui When the output device is LVDS, maybe the pixel clock of adjusted_mode will be less than that in mode. In such case it will set the incorrect multipler factor in DPLL_MD register. So the dpll_md_reg will be reset when the output type is non-SDVO https://bugs.freedesktop.org/show_bug.cgi?id=22761 Signed-off-by: Zhao Yakui Reviewd-by: Eric Anholt --- drivers/gpu/drm/i915/intel_display.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) Index: linux-2.6/drivers/gpu/drm/i915/intel_display.c =================================================================== --- linux-2.6.orig/drivers/gpu/drm/i915/intel_display.c 2009-09-10 15:30:29.000000000 +0800 +++ linux-2.6/drivers/gpu/drm/i915/intel_display.c 2009-09-10 15:33:37.000000000 +0800 @@ -2652,9 +2652,12 @@ udelay(150); if (IS_I965G(dev) && !IS_IGDNG(dev)) { - sdvo_pixel_multiply = adjusted_mode->clock / mode->clock; - I915_WRITE(dpll_md_reg, (0 << DPLL_MD_UDI_DIVIDER_SHIFT) | + if (is_sdvo) { + sdvo_pixel_multiply = adjusted_mode->clock / mode->clock; + I915_WRITE(dpll_md_reg, (0 << DPLL_MD_UDI_DIVIDER_SHIFT) | ((sdvo_pixel_multiply - 1) << DPLL_MD_UDI_MULTIPLIER_SHIFT)); + } else + I915_WRITE(dpll_md_reg, 0); } else { /* write it again -- the BIOS does, after all */ I915_WRITE(dpll_reg, dpll);