diff mbox

drm/i915: Fix typo for wrong LVDS clock setting on IGDNG

Message ID 1253343249-12008-2-git-send-email-zhenyuw@linux.intel.com (mailing list archive)
State Accepted
Headers show

Commit Message

Zhenyu Wang Sept. 19, 2009, 6:54 a.m. UTC 
New register for PCH LVDS on IGDNG should be used.
This is a copy-n-paste typo. This fixes possible dual
channel LVDS panel failure on IGDNG.

Cc: Stable Team <stable@kernel.org>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

Comments

Jesse Barnes Sept. 17, 2009, 9:47 p.m. UTC | #1 
On Sat, 19 Sep 2009 14:54:06 +0800
Zhenyu Wang <zhenyuw@linux.intel.com> wrote:

> New register for PCH LVDS on IGDNG should be used.
> This is a copy-n-paste typo. This fixes possible dual
> channel LVDS panel failure on IGDNG.
> 
> Cc: Stable Team <stable@kernel.org>
> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

Applied this series to drm-intel-next, thanks.
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index cadb9ef..d2f3692 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -877,7 +877,7 @@  intel_igdng_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
 					       refclk, best_clock);
 
 	if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
-		if ((I915_READ(LVDS) & LVDS_CLKB_POWER_MASK) ==
+		if ((I915_READ(PCH_LVDS) & LVDS_CLKB_POWER_MASK) ==
 		    LVDS_CLKB_POWER_UP)
 			clock.p2 = limit->p2.p2_fast;
 		else