From patchwork Sat Sep 19 06:54:06 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhenyu Wang X-Patchwork-Id: 47828 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id n8G5sWts019549 for ; Wed, 16 Sep 2009 05:54:32 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4A8B89E98B; Tue, 15 Sep 2009 22:54:31 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from fmsmga102.fm.intel.com (mga10.intel.com [192.55.52.92]) by gabe.freedesktop.org (Postfix) with ESMTP id 2CB489E7B3 for ; Tue, 15 Sep 2009 22:54:28 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga102.fm.intel.com with ESMTP; 15 Sep 2009 22:42:44 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.44,395,1249282800"; d="scan'208";a="493895383" Received: from ubuntu-ilm.sh.intel.com (HELO localhost.localdomain) ([10.239.36.94]) by fmsmga002.fm.intel.com with ESMTP; 15 Sep 2009 22:46:41 -0700 From: Zhenyu Wang To: eric@anholt.net Date: Sat, 19 Sep 2009 14:54:06 +0800 Message-Id: <1253343249-12008-2-git-send-email-zhenyuw@linux.intel.com> X-Mailer: git-send-email 1.6.0.4 In-Reply-To: <1253343249-12008-1-git-send-email-zhenyuw@linux.intel.com> References: <1253343249-12008-1-git-send-email-zhenyuw@linux.intel.com> Cc: intel-gfx@lists.freedesktop.org, Stable Team Subject: [Intel-gfx] [PATCH] drm/i915: Fix typo for wrong LVDS clock setting on IGDNG X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.9 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org New register for PCH LVDS on IGDNG should be used. This is a copy-n-paste typo. This fixes possible dual channel LVDS panel failure on IGDNG. Cc: Stable Team Signed-off-by: Zhenyu Wang --- drivers/gpu/drm/i915/intel_display.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index cadb9ef..d2f3692 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -877,7 +877,7 @@ intel_igdng_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc, refclk, best_clock); if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) { - if ((I915_READ(LVDS) & LVDS_CLKB_POWER_MASK) == + if ((I915_READ(PCH_LVDS) & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP) clock.p2 = limit->p2.p2_fast; else