From patchwork Fri Dec 4 13:48:24 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhao, Yakui" X-Patchwork-Id: 64863 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id nB4DoDs7007604 for ; Fri, 4 Dec 2009 13:50:13 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 91BAC9E904; Fri, 4 Dec 2009 05:50:13 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 4F13C9E812 for ; Fri, 4 Dec 2009 05:50:11 -0800 (PST) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP; 04 Dec 2009 05:44:14 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.47,340,1257148800"; d="scan'208";a="519779180" Received: from yakui_zhao.sh.intel.com (HELO localhost.localdomain) ([10.239.13.200]) by fmsmga002.fm.intel.com with ESMTP; 04 Dec 2009 05:50:07 -0800 From: yakui.zhao@intel.com To: eric@anholt.net Date: Fri, 4 Dec 2009 21:48:24 +0800 Message-Id: <1259934504-25350-1-git-send-email-yakui.zhao@intel.com> X-Mailer: git-send-email 1.5.4.5 Cc: intel-gfx@lists.freedesktop.org Subject: [Intel-gfx] [PATCH] drm/i915: select the appropriate pipe for LVDS X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.9 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index ca1ba42..3193498 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -283,6 +283,12 @@ typedef struct drm_i915_private { /* Register state */ bool modeset_on_lid; + /* + * record the pipe used by LVDS. + * 0 means the pipe A. + * 1 means the PIPE B + */ + int lvds_pipe; u8 saveLBB; u32 saveDSPACNTR; u32 saveDSPBCNTR; diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 65b76ff..5eda183 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3183,7 +3183,10 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, lvds_reg = PCH_LVDS; lvds = I915_READ(lvds_reg); - lvds |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP | LVDS_PIPEB_SELECT; + lvds |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP; + /* select the correct pipe for LVDS */ + if (dev_priv->lvds_pipe) + lvds |= LVDS_PIPEB_SELECT; /* set the corresponsding LVDS_BORDER bit */ lvds |= dev_priv->lvds_border_bits; /* Set the B0-B3 data pairs corresponding to whether we're going to diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c index 02b813e..5103167 100644 --- a/drivers/gpu/drm/i915/intel_lvds.c +++ b/drivers/gpu/drm/i915/intel_lvds.c @@ -1069,6 +1069,23 @@ void intel_lvds_init(struct drm_device *dev) intel_output->clone_mask = (1 << INTEL_LVDS_CLONE_BIT); intel_output->crtc_mask = (1 << 1); + /* + * By default we will use the pipe B for LVDS. But we can also use + * pipe A for integrated LVDS on the 965/g4x/Ironlake platform. + * If the BIOS select the pipe A for LVDS, we can also use pipe A + * for LVDS. In such case we will change the crtc mask for LVDS. + */ + dev_priv->lvds_pipe = 1; + if (IS_I965G(dev)) { + if (IS_IGDNG(dev)) + lvds = I915_READ(PCH_LVDS); + else + lvds = I915_READ(LVDS); + if ((lvds & LVDS_PORT_EN) && !(lvds & LVDS_PIPEB_SELECT)) { + dev_priv->lvds_pipe = 0; + intel_output->crtc_mask = (1 << 0); + } + } drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs); drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs); connector->display_info.subpixel_order = SubPixelHorizontalRGB;