@@ -876,8 +876,7 @@ void i915_gem_cleanup_ringbuffer(struct drm_device *dev);
int i915_gem_do_init(struct drm_device *dev, unsigned long start,
unsigned long end);
int i915_gem_idle(struct drm_device *dev);
-uint32_t i915_add_request(struct drm_device *dev, struct drm_file *file_priv,
- uint32_t flush_domains);
+uint32_t i915_add_request(struct drm_device *dev, struct drm_file *file_priv);
int i915_do_wait_request(struct drm_device *dev, uint32_t seqno, int interruptible);
int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
int i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj,
@@ -1584,8 +1584,7 @@ i915_gem_object_move_to_inactive(struct drm_gem_object *obj)
}
static void
-i915_gem_process_flushing_list(struct drm_device *dev,
- uint32_t flush_domains, uint32_t seqno)
+i915_gem_process_flushing_list(struct drm_device *dev, uint32_t flush_domains)
{
drm_i915_private_t *dev_priv = dev->dev_private;
struct drm_i915_gem_object *obj_priv, *next;
@@ -1601,7 +1600,7 @@ i915_gem_process_flushing_list(struct drm_device *dev,
obj->write_domain = 0;
list_del_init(&obj_priv->gpu_write_list);
- i915_gem_object_move_to_active(obj, seqno);
+ i915_gem_object_move_to_active(obj, 0);
/* update the fence lru list */
if (obj_priv->fence_reg != I915_FENCE_REG_NONE) {
@@ -1627,8 +1626,7 @@ i915_gem_process_flushing_list(struct drm_device *dev,
* Returned sequence numbers are nonzero on success.
*/
uint32_t
-i915_add_request(struct drm_device *dev, struct drm_file *file_priv,
- uint32_t flush_domains)
+i915_add_request(struct drm_device *dev, struct drm_file *file_priv)
{
drm_i915_private_t *dev_priv = dev->dev_private;
struct drm_i915_file_private *i915_file_priv = NULL;
@@ -1673,12 +1671,6 @@ i915_add_request(struct drm_device *dev, struct drm_file *file_priv,
INIT_LIST_HEAD(&request->client_list);
}
- /* Associate any objects on the flushing list matching the write
- * domain we're flushing with our request.
- */
- if (flush_domains != 0)
- i915_gem_process_flushing_list(dev, flush_domains, seqno);
-
if (!dev_priv->mm.suspended) {
mod_timer(&dev_priv->hangcheck_timer, jiffies + DRM_I915_HANGCHECK_PERIOD);
if (was_empty)
@@ -1693,22 +1685,21 @@ i915_add_request(struct drm_device *dev, struct drm_file *file_priv,
* Ensures that all commands in the ring are finished
* before signalling the CPU
*/
-static uint32_t
+static void
i915_retire_commands(struct drm_device *dev)
{
drm_i915_private_t *dev_priv = dev->dev_private;
uint32_t cmd = MI_FLUSH | MI_NO_WRITE_FLUSH;
- uint32_t flush_domains = 0;
RING_LOCALS;
- /* The sampler always gets flushed on i965 (sigh) */
- if (IS_I965G(dev))
- flush_domains |= I915_GEM_DOMAIN_SAMPLER;
BEGIN_LP_RING(2);
OUT_RING(cmd);
OUT_RING(0); /* noop */
ADVANCE_LP_RING();
- return flush_domains;
+
+ /* The sampler always gets flushed on i965 (sigh) */
+ if (IS_I965G(dev))
+ i915_gem_process_flushing_list(dev, I915_GEM_DOMAIN_SAMPLER);
}
/**
@@ -1992,7 +1983,7 @@ i915_gem_flush(struct drm_device *dev,
* domain we're flushing with the next request.
*/
if (flush_domains != 0)
- i915_gem_process_flushing_list(dev, flush_domains, 0);
+ i915_gem_process_flushing_list(dev, flush_domains);
}
@@ -2151,7 +2142,7 @@ i915_gpu_idle(struct drm_device *dev)
/* Flush everything onto the inactive list. */
i915_gem_flush(dev, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
- seqno = i915_add_request(dev, NULL, 0);
+ seqno = i915_add_request(dev, NULL);
if (seqno == 0)
return -ENOMEM;
@@ -2264,7 +2255,7 @@ i915_gem_evict_something(struct drm_device *dev, int min_size)
i915_gem_flush(dev,
obj->write_domain,
obj->write_domain);
- seqno = i915_add_request(dev, NULL, 0);
+ seqno = i915_add_request(dev, NULL);
if (seqno == 0)
return -ENOMEM;
@@ -2777,7 +2768,7 @@ i915_gem_object_flush_gpu_write_domain(struct drm_gem_object *obj)
/* Queue the GPU write cache flushing we need. */
old_write_domain = obj->write_domain;
i915_gem_flush(dev, 0, obj->write_domain);
- (void) i915_add_request(dev, NULL, 0);
+ (void) i915_add_request(dev, NULL);
BUG_ON(obj->write_domain);
trace_i915_gem_object_change_domain(obj,
@@ -3734,7 +3725,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
struct drm_i915_gem_relocation_entry *relocs;
int ret = 0, ret2, i, pinned = 0;
uint64_t exec_offset;
- uint32_t seqno, flush_domains, reloc_index;
+ uint32_t seqno, reloc_index;
int pin_tries, flips;
#if WATCH_EXEC
@@ -3971,7 +3962,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
* Ensure that the commands in the batch buffer are
* finished before the interrupt fires
*/
- flush_domains = i915_retire_commands(dev);
+ i915_retire_commands(dev);
i915_verify_inactive(dev, __FILE__, __LINE__);
@@ -3982,7 +3973,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
* *some* interrupts representing completion of buffers that we can
* wait on when trying to clear up gtt space).
*/
- seqno = i915_add_request(dev, file_priv, flush_domains);
+ seqno = i915_add_request(dev, file_priv);
BUG_ON(seqno == 0);
for (i = 0; i < args->buffer_count; i++) {
struct drm_gem_object *obj = object_list[i];
@@ -199,9 +199,6 @@ static struct overlay_registers *intel_overlay_map_regs_atomic(struct intel_over
static void intel_overlay_unmap_regs_atomic(struct intel_overlay *overlay)
{
- struct drm_device *dev = overlay->dev;
- drm_i915_private_t *dev_priv = dev->dev_private;
-
if (OVERLAY_NONPHYSICAL(overlay->dev))
io_mapping_unmap_atomic(overlay->virt_addr);
@@ -232,7 +229,7 @@ static int intel_overlay_on(struct intel_overlay *overlay)
OUT_RING(MI_NOOP);
ADVANCE_LP_RING();
- overlay->last_flip_req = i915_add_request(dev, NULL, 0);
+ overlay->last_flip_req = i915_add_request(dev, NULL);
if (overlay->last_flip_req == 0)
return -ENOMEM;
@@ -272,7 +269,7 @@ static void intel_overlay_continue(struct intel_overlay *overlay,
OUT_RING(flip_addr);
ADVANCE_LP_RING();
- overlay->last_flip_req = i915_add_request(dev, NULL, 0);
+ overlay->last_flip_req = i915_add_request(dev, NULL);
}
static int intel_overlay_wait_flip(struct intel_overlay *overlay)
@@ -303,7 +300,7 @@ static int intel_overlay_wait_flip(struct intel_overlay *overlay)
OUT_RING(MI_NOOP);
ADVANCE_LP_RING();
- overlay->last_flip_req = i915_add_request(dev, NULL, 0);
+ overlay->last_flip_req = i915_add_request(dev, NULL);
if (overlay->last_flip_req == 0)
return -ENOMEM;
@@ -345,7 +342,7 @@ static int intel_overlay_off(struct intel_overlay *overlay)
OUT_RING(MI_NOOP);
ADVANCE_LP_RING();
- overlay->last_flip_req = i915_add_request(dev, NULL, 0);
+ overlay->last_flip_req = i915_add_request(dev, NULL);
if (overlay->last_flip_req == 0)
return -ENOMEM;
@@ -365,7 +362,7 @@ static int intel_overlay_off(struct intel_overlay *overlay)
OUT_RING(MI_NOOP);
ADVANCE_LP_RING();
- overlay->last_flip_req = i915_add_request(dev, NULL, 0);
+ overlay->last_flip_req = i915_add_request(dev, NULL);
if (overlay->last_flip_req == 0)
return -ENOMEM;
@@ -411,7 +408,7 @@ int intel_overlay_recover_from_interrupt(struct intel_overlay *overlay,
return -EIO;
if (overlay->last_flip_req == 0) {
- overlay->last_flip_req = i915_add_request(dev, NULL, 0);
+ overlay->last_flip_req = i915_add_request(dev, NULL);
if (overlay->last_flip_req == 0)
return -ENOMEM;
}
@@ -442,7 +439,7 @@ int intel_overlay_recover_from_interrupt(struct intel_overlay *overlay,
OUT_RING(MI_NOOP);
ADVANCE_LP_RING();
- overlay->last_flip_req = i915_add_request(dev, NULL, 0);
+ overlay->last_flip_req = i915_add_request(dev, NULL);
if (overlay->last_flip_req == 0)
return -ENOMEM;