[3/3] drm/intel: Use 10-bit palette properly, only store 129 entries

Commit Message

Peter Clifton April 26, 2010, 10:24 p.m. UTC

None

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 5e8191a..16cc13c 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3453,28 +3453,22 @@  void intel_crtc_load_lut(struct drm_crtc *crtc)
 	I915_WRITE(pipeconf_reg, pipeconf);
 	I915_READ(pipeconf_reg);
 
-	/* Use every other value from the LUT passed,
-	 * 10-bit mode uses 128 entries. */
 	for (i = 0; i < 128; i++) {
 		I915_WRITE(pal_reg + 8 * i,
-			   ((intel_crtc->lut_r[2 * i] & 0xFF) << 16) |
-			   ((intel_crtc->lut_g[2 * i] & 0xFF) << 8) |
-			   (intel_crtc->lut_b[2 * i] & 0xFF));
+			   ((intel_crtc->lut_r[i] & 0xFF) << 16) |
+			   ((intel_crtc->lut_g[i] & 0xFF) << 8) |
+			   (intel_crtc->lut_b[i] & 0xFF));
 		I915_WRITE(pal_reg + 8 * i + 4,
-			   ((intel_crtc->lut_r[2 * i] >> 8) << 16) |
-			   ((intel_crtc->lut_g[2 * i] >> 8) << 8) |
-			   (intel_crtc->lut_b[2 * i] >> 8));
+			   ((intel_crtc->lut_r[i] >> 8) << 16) |
+			   ((intel_crtc->lut_g[i] >> 8) << 8) |
+			   (intel_crtc->lut_b[i] >> 8));
 	}
 
-	/* FIXME: Distortion here, we're trying to get 129 evenly spaced
-	 * samples from a LUT with 256 entries. We use 0, 2, 4 ... 254,
-	 * for the main palette, then entry 255 for this last register.
-	 */
 	/* Note that these registers _could_ take the LUT value of
 	 * 1024, but we're maxing out at 1023.984375 as it is easier. */
-	I915_WRITE(maxr_reg, intel_crtc->lut_r[255]);
-	I915_WRITE(maxg_reg, intel_crtc->lut_g[255]);
-	I915_WRITE(maxb_reg, intel_crtc->lut_b[255]);
+	I915_WRITE(maxr_reg, intel_crtc->lut_r[128]);
+	I915_WRITE(maxg_reg, intel_crtc->lut_g[128]);
+	I915_WRITE(maxb_reg, intel_crtc->lut_b[128]);
 }
 
 static int intel_crtc_cursor_set(struct drm_crtc *crtc,
@@ -3649,10 +3643,10 @@  static void intel_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	int i;
 
-	if (size != 256)
+	if (size != 129)
 		return;
 
-	for (i = 0; i < 256; i++) {
+	for (i = 0; i < 129; i++) {
 		intel_crtc->lut_r[i] = red[i];
 		intel_crtc->lut_g[i] = green[i];
 		intel_crtc->lut_b[i] = blue[i];
@@ -4309,13 +4303,13 @@  static void intel_crtc_init(struct drm_device *dev, int pipe)
 
 	drm_crtc_init(dev, &intel_crtc->base, &intel_crtc_funcs);
 
-	drm_mode_crtc_set_gamma_size(&intel_crtc->base, 256);
+	drm_mode_crtc_set_gamma_size(&intel_crtc->base, 129);
 	intel_crtc->pipe = pipe;
 	intel_crtc->plane = pipe;
-	for (i = 0; i < 256; i++) {
-		intel_crtc->lut_r[i] = i << 8 | i;
-		intel_crtc->lut_g[i] = i << 8 | i;
-		intel_crtc->lut_b[i] = i << 8 | i;
+	for (i = 0; i < 129; i++) {
+		intel_crtc->lut_r[i] = (u16)((int)0xFFFF * i / 128);
+		intel_crtc->lut_g[i] = (u16)((int)0xFFFF * i / 128);
+		intel_crtc->lut_b[i] = (u16)((int)0xFFFF * i / 128);
 	}
 
 	/* Swap pipes & planes for FBC on pre-965 */
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 6f09806..cbd3c50 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -143,7 +143,7 @@  struct intel_crtc {
 	enum plane plane;
 	struct drm_gem_object *cursor_bo;
 	uint32_t cursor_addr;
-	u16 lut_r[256], lut_g[256], lut_b[256];
+	u16 lut_r[129], lut_g[129], lut_b[129];
 	int dpms_mode;
 	bool busy; /* is scanout buffer being updated frequently? */
 	struct timer_list idle_timer;