From patchwork Mon Apr 26 22:24:18 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Clifton X-Patchwork-Id: 95231 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o3QMPvMC014527 for ; Mon, 26 Apr 2010 22:26:33 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E33779EB72 for ; Mon, 26 Apr 2010 15:25:56 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from ppsw-32.csi.cam.ac.uk (ppsw-32.csi.cam.ac.uk [131.111.8.132]) by gabe.freedesktop.org (Postfix) with ESMTP id 410D49EB49 for ; Mon, 26 Apr 2010 15:24:43 -0700 (PDT) X-Cam-AntiVirus: no malware found X-Cam-SpamDetails: not scanned X-Cam-ScannerInfo: http://www.cam.ac.uk/cs/email/scanner/ Received: from 81-5-163-105.dsl.eclipse.net.uk ([81.5.163.105]:42309 helo=localhost.localdomain) by ppsw-32.csi.cam.ac.uk (smtp.hermes.cam.ac.uk [131.111.8.158]:465) with esmtpsa (LOGIN:pcjc2) (TLSv1:DHE-RSA-AES256-SHA:256) id 1O6WjK-0002Vp-BW (Exim 4.70) (return-path ); Mon, 26 Apr 2010 23:24:42 +0100 From: Peter Clifton To: "intel-gfx@lists.freedesktop.org" Date: Mon, 26 Apr 2010 23:24:18 +0100 Message-Id: <1272320658-2157-3-git-send-email-pcjc2@cam.ac.uk> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1272320445.23864.4.camel@pcjc2lap> References: <1272320445.23864.4.camel@pcjc2lap> Subject: [Intel-gfx] [PATCH 3/3] drm/intel: Use 10-bit palette properly, only store 129 entries X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Mon, 26 Apr 2010 22:26:40 +0000 (UTC) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 5e8191a..16cc13c 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3453,28 +3453,22 @@ void intel_crtc_load_lut(struct drm_crtc *crtc) I915_WRITE(pipeconf_reg, pipeconf); I915_READ(pipeconf_reg); - /* Use every other value from the LUT passed, - * 10-bit mode uses 128 entries. */ for (i = 0; i < 128; i++) { I915_WRITE(pal_reg + 8 * i, - ((intel_crtc->lut_r[2 * i] & 0xFF) << 16) | - ((intel_crtc->lut_g[2 * i] & 0xFF) << 8) | - (intel_crtc->lut_b[2 * i] & 0xFF)); + ((intel_crtc->lut_r[i] & 0xFF) << 16) | + ((intel_crtc->lut_g[i] & 0xFF) << 8) | + (intel_crtc->lut_b[i] & 0xFF)); I915_WRITE(pal_reg + 8 * i + 4, - ((intel_crtc->lut_r[2 * i] >> 8) << 16) | - ((intel_crtc->lut_g[2 * i] >> 8) << 8) | - (intel_crtc->lut_b[2 * i] >> 8)); + ((intel_crtc->lut_r[i] >> 8) << 16) | + ((intel_crtc->lut_g[i] >> 8) << 8) | + (intel_crtc->lut_b[i] >> 8)); } - /* FIXME: Distortion here, we're trying to get 129 evenly spaced - * samples from a LUT with 256 entries. We use 0, 2, 4 ... 254, - * for the main palette, then entry 255 for this last register. - */ /* Note that these registers _could_ take the LUT value of * 1024, but we're maxing out at 1023.984375 as it is easier. */ - I915_WRITE(maxr_reg, intel_crtc->lut_r[255]); - I915_WRITE(maxg_reg, intel_crtc->lut_g[255]); - I915_WRITE(maxb_reg, intel_crtc->lut_b[255]); + I915_WRITE(maxr_reg, intel_crtc->lut_r[128]); + I915_WRITE(maxg_reg, intel_crtc->lut_g[128]); + I915_WRITE(maxb_reg, intel_crtc->lut_b[128]); } static int intel_crtc_cursor_set(struct drm_crtc *crtc, @@ -3649,10 +3643,10 @@ static void intel_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, struct intel_crtc *intel_crtc = to_intel_crtc(crtc); int i; - if (size != 256) + if (size != 129) return; - for (i = 0; i < 256; i++) { + for (i = 0; i < 129; i++) { intel_crtc->lut_r[i] = red[i]; intel_crtc->lut_g[i] = green[i]; intel_crtc->lut_b[i] = blue[i]; @@ -4309,13 +4303,13 @@ static void intel_crtc_init(struct drm_device *dev, int pipe) drm_crtc_init(dev, &intel_crtc->base, &intel_crtc_funcs); - drm_mode_crtc_set_gamma_size(&intel_crtc->base, 256); + drm_mode_crtc_set_gamma_size(&intel_crtc->base, 129); intel_crtc->pipe = pipe; intel_crtc->plane = pipe; - for (i = 0; i < 256; i++) { - intel_crtc->lut_r[i] = i << 8 | i; - intel_crtc->lut_g[i] = i << 8 | i; - intel_crtc->lut_b[i] = i << 8 | i; + for (i = 0; i < 129; i++) { + intel_crtc->lut_r[i] = (u16)((int)0xFFFF * i / 128); + intel_crtc->lut_g[i] = (u16)((int)0xFFFF * i / 128); + intel_crtc->lut_b[i] = (u16)((int)0xFFFF * i / 128); } /* Swap pipes & planes for FBC on pre-965 */ diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 6f09806..cbd3c50 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -143,7 +143,7 @@ struct intel_crtc { enum plane plane; struct drm_gem_object *cursor_bo; uint32_t cursor_addr; - u16 lut_r[256], lut_g[256], lut_b[256]; + u16 lut_r[129], lut_g[129], lut_b[129]; int dpms_mode; bool busy; /* is scanout buffer being updated frequently? */ struct timer_list idle_timer;