diff mbox

[2/2] Replace ROUND_* macros with ALIGN.

Message ID 1282426345-15853-2-git-send-email-mattst88@gmail.com (mailing list archive)
State Deferred, archived
Headers show

Commit Message

Matt Turner Aug. 21, 2010, 9:32 p.m. UTC
None
diff mbox

Patch

diff --git a/src/common.h b/src/common.h
index f244e08..f7e4923 100644
--- a/src/common.h
+++ b/src/common.h
@@ -160,10 +160,6 @@  static inline void memcpy_volatile(volatile void *dst, const void *src,
 #define I810_REG_SIZE 0x80000
 
 #define GTT_PAGE_SIZE			KB(4)
-#define ROUND_TO(x, y)			(((x) + (y) - 1) / (y) * (y))
-#define ROUND_DOWN_TO(x, y)		((x) / (y) * (y))
-#define ROUND_TO_PAGE(x)		ROUND_TO((x), GTT_PAGE_SIZE)
-#define ROUND_TO_MB(x)			ROUND_TO((x), MB(1))
 #define PRIMARY_RINGBUFFER_SIZE		KB(128)
 #define MIN_SCRATCH_BUFFER_SIZE		KB(16)
 #define MAX_SCRATCH_BUFFER_SIZE		KB(64)
diff --git a/src/intel_memory.c b/src/intel_memory.c
index b42e6d7..091e3d0 100644
--- a/src/intel_memory.c
+++ b/src/intel_memory.c
@@ -128,7 +128,7 @@  intel_get_fence_pitch(intel_screen_private *intel, unsigned long pitch,
 
 	/* 965 is flexible */
 	if (IS_I965G(intel))
-		return ROUND_TO(pitch, tile_width);
+		return ALIGN(pitch, tile_width);
 
 	/* Pre-965 needs power of two tile width */
 	for (i = tile_width; i < pitch; i <<= 1) ;
diff --git a/src/intel_uxa.c b/src/intel_uxa.c
index 3c03ca7..b51c4eb 100644
--- a/src/intel_uxa.c
+++ b/src/intel_uxa.c
@@ -142,7 +142,7 @@  intel_uxa_pixmap_compute_size(PixmapPtr pixmap,
 	if (*tiling != I915_TILING_NONE) {
 		/* First check whether tiling is necessary. */
 		pitch = (w * pixmap->drawable.bitsPerPixel + 7) / 8;
-		pitch = ROUND_TO(pitch, intel->accel_pixmap_pitch_alignment);
+		pitch = ALIGN(pitch, intel->accel_pixmap_pitch_alignment);
 		size = pitch * ALIGN (h, 2);
 		if (!IS_I965G(intel)) {
 			/* Older hardware requires fences to be pot size
@@ -179,7 +179,7 @@  intel_uxa_pixmap_compute_size(PixmapPtr pixmap,
 			aligned_h = ALIGN(h, 32);
 
 		*stride = intel_get_fence_pitch(intel,
-						ROUND_TO(pitch, 512),
+						ALIGN(pitch, 512),
 						*tiling);
 
 		/* Round the object up to the size of the fence it will live in
@@ -199,7 +199,7 @@  intel_uxa_pixmap_compute_size(PixmapPtr pixmap,
 		 * subspan doesn't address an invalid page offset beyond the
 		 * end of the GTT.
 		 */
-		*stride = ROUND_TO(pitch, intel->accel_pixmap_pitch_alignment);
+		*stride = ALIGN(pitch, intel->accel_pixmap_pitch_alignment);
 		size = *stride * ALIGN(h, 2);
 	}
 
diff --git a/src/legacy/i810/i810_common.h b/src/legacy/i810/i810_common.h
index a526f73..14b2993 100644
--- a/src/legacy/i810/i810_common.h
+++ b/src/legacy/i810/i810_common.h
@@ -138,10 +138,6 @@  extern int I810_DEBUG;
 #define I810_REG_SIZE 0x80000
 
 #define GTT_PAGE_SIZE			KB(4)
-#define ROUND_TO(x, y)			(((x) + (y) - 1) / (y) * (y))
-#define ROUND_DOWN_TO(x, y)		((x) / (y) * (y))
-#define ROUND_TO_PAGE(x)		ROUND_TO((x), GTT_PAGE_SIZE)
-#define ROUND_TO_MB(x)			ROUND_TO((x), MB(1))
 #define PRIMARY_RINGBUFFER_SIZE		KB(128)
 #define MIN_SCRATCH_BUFFER_SIZE		KB(16)
 #define MAX_SCRATCH_BUFFER_SIZE		KB(64)