From patchwork Wed Sep 1 20:30:04 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 147481 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id o81LsRXr019254 for ; Wed, 1 Sep 2010 21:55:03 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2F4579EE9B for ; Wed, 1 Sep 2010 13:36:51 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail.ffwll.ch (cable-static-49-187.intergga.ch [157.161.49.187]) by gabe.freedesktop.org (Postfix) with ESMTP id 905269EBA2 for ; Wed, 1 Sep 2010 13:28:56 -0700 (PDT) Received: by mail.ffwll.ch (Postfix, from userid 1000) id 79E2920C219; Wed, 1 Sep 2010 22:31:08 +0200 (CEST) X-Spam-ASN: X-Spam-Checker-Version: SpamAssassin 3.2.5 (2008-06-10) on orange.ffwll.ch X-Spam-Level: X-Spam-Hammy: 0.000-+--H*UA:git-send-email, 0.000-+--H*x:git-send-email, 0.000-+--H*x:1.7.1 X-Spam-Status: No, score=-4.5 required=6.0 tests=ALL_TRUSTED,AWL,BAYES_00 autolearn=ham version=3.2.5 X-Spam-Spammy: 0.961-+--H*r:mail.ffwll.ch, 0.960-+--H*m:ffwll, 0.945-+--H*Ad:U*daniel.vetter Received: from viiv.ffwll.ch (viiv.ffwll.ch [192.168.23.128]) by mail.ffwll.ch (Postfix) with ESMTP id 1681E20C275; Wed, 1 Sep 2010 22:30:21 +0200 (CEST) Received: from daniel by viiv.ffwll.ch with local (Exim 4.72) (envelope-from ) id 1Oqtwq-0000NH-RG; Wed, 01 Sep 2010 22:30:20 +0200 From: Daniel Vetter To: intel-gfx@lists.freedesktop.org Date: Wed, 1 Sep 2010 22:30:04 +0200 Message-Id: <1283373010-1314-18-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1283373010-1314-1-git-send-email-daniel.vetter@ffwll.ch> References: <1283373010-1314-1-git-send-email-daniel.vetter@ffwll.ch> Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 17/23] intel-gtt: consolidate the gtt ioremap calls X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Wed, 01 Sep 2010 21:55:06 +0000 (UTC) diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c index f4308d3..0ebb76a 100644 --- a/drivers/char/agp/intel-gtt.c +++ b/drivers/char/agp/intel-gtt.c @@ -73,6 +73,7 @@ static struct _intel_private { struct pci_dev *pcidev; /* device one */ struct pci_dev *bridge_dev; u8 __iomem *registers; + phys_addr_t gtt_bus_addr; u32 __iomem *gtt; /* I915G */ int num_dcache_entries; union { @@ -769,10 +770,27 @@ static unsigned int intel_gtt_mappable_entries(void) static int intel_gtt_init(void) { + u32 gtt_map_size; + + intel_private.base.gtt_mappable_entries = intel_gtt_mappable_entries(); + intel_private.base.gtt_total_entries = intel_gtt_total_entries(); + + gtt_map_size = intel_private.base.gtt_total_entries * 4; + + intel_private.gtt = ioremap(intel_private.gtt_bus_addr, + gtt_map_size); + if (!intel_private.gtt) { + iounmap(intel_private.registers); + return -ENOMEM; + } + + global_cache_flush(); /* FIXME: ? */ + /* we have to call this as early as possible after the MMIO base address is known */ intel_private.base.gtt_stolen_entries = intel_gtt_stolen_entries(); if (intel_private.base.gtt_stolen_entries == 0) { iounmap(intel_private.registers); + iounmap(intel_private.gtt); return -ENOMEM; } @@ -853,7 +871,6 @@ static int intel_i830_create_gatt_table(struct agp_bridge_data *bridge) int page_order, ret; struct aper_size_info_fixed *size; int num_entries; - int gtt_map_size; u32 temp; size = agp_bridge->current_size; @@ -868,17 +885,8 @@ static int intel_i830_create_gatt_table(struct agp_bridge_data *bridge) if (!intel_private.registers) return -ENOMEM; - intel_private.base.gtt_total_entries = intel_gtt_total_entries(); - gtt_map_size = intel_private.base.gtt_total_entries * 4; - - intel_private.gtt = ioremap(temp + I810_PTE_BASE, gtt_map_size); - if (!intel_private.gtt) { - iounmap(intel_private.registers); - return -ENOMEM; - } - + intel_private.gtt_bus_addr = temp + I810_PTE_BASE; temp = readl(intel_private.registers+I810_PGETBL_CTL) & 0xfffff000; - global_cache_flush(); /* FIXME: ?? */ ret = intel_gtt_init(); if (ret != 0) @@ -1247,7 +1255,6 @@ static int intel_i915_create_gatt_table(struct agp_bridge_data *bridge) struct aper_size_info_fixed *size; int num_entries; u32 temp, temp2; - int gtt_map_size; size = agp_bridge->current_size; page_order = size->page_order; @@ -1263,23 +1270,12 @@ static int intel_i915_create_gatt_table(struct agp_bridge_data *bridge) if (!intel_private.registers) return -ENOMEM; - intel_private.base.gtt_total_entries = intel_gtt_total_entries(); - gtt_map_size = intel_private.base.gtt_total_entries * 4; - - intel_private.gtt = ioremap(temp2, gtt_map_size); - if (!intel_private.gtt) { - iounmap(intel_private.registers); - return -ENOMEM; - } - + intel_private.gtt_bus_addr = temp2; temp = readl(intel_private.registers+I810_PGETBL_CTL) & 0xfffff000; - global_cache_flush(); /* FIXME: ? */ ret = intel_gtt_init(); - if (ret != 0) { - iounmap(intel_private.gtt); + if (ret != 0) return ret; - } agp_bridge->gatt_table = NULL; @@ -1317,7 +1313,7 @@ static unsigned long intel_gen6_mask_memory(struct agp_bridge_data *bridge, return addr | bridge->driver->masks[type].mask; } -static void intel_i965_get_gtt_range(int *gtt_offset, int *gtt_size) +static void intel_i965_get_gtt_range(int *gtt_offset) { switch (INTEL_GTT_GEN) { case 5: @@ -1329,8 +1325,6 @@ static void intel_i965_get_gtt_range(int *gtt_offset, int *gtt_size) *gtt_offset = KB(512); break; } - - *gtt_size = intel_private.base.gtt_total_entries * 4; } /* The intel i965 automatically initializes the agp aperture during POST. @@ -1342,7 +1336,7 @@ static int intel_i965_create_gatt_table(struct agp_bridge_data *bridge) struct aper_size_info_fixed *size; int num_entries; u32 temp; - int gtt_offset, gtt_size; + int gtt_offset; size = agp_bridge->current_size; page_order = size->page_order; @@ -1357,25 +1351,13 @@ static int intel_i965_create_gatt_table(struct agp_bridge_data *bridge) if (!intel_private.registers) return -ENOMEM; - intel_private.base.gtt_total_entries = intel_gtt_total_entries(); - - intel_i965_get_gtt_range(>t_offset, >t_size); - - intel_private.gtt = ioremap((temp + gtt_offset) , gtt_size); - - if (!intel_private.gtt) { - iounmap(intel_private.gtt); - return -ENOMEM; - } - + intel_i965_get_gtt_range(>t_offset); + intel_private.gtt_bus_addr = temp + gtt_offset; temp = readl(intel_private.registers+I810_PGETBL_CTL) & 0xfffff000; - global_cache_flush(); /* FIXME: ? */ ret = intel_gtt_init(); - if (ret != 0) { - iounmap(intel_private.gtt); + if (ret != 0) return ret; - } agp_bridge->gatt_table = NULL;