From patchwork Fri Sep 24 17:32:08 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 206582 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id o8OHWh3D007823 for ; Fri, 24 Sep 2010 17:33:19 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C68999E7B4 for ; Fri, 24 Sep 2010 10:32:43 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail.ffwll.ch (cable-static-49-187.intergga.ch [157.161.49.187]) by gabe.freedesktop.org (Postfix) with ESMTP id 580E19EB5F for ; Fri, 24 Sep 2010 10:30:07 -0700 (PDT) Received: by mail.ffwll.ch (Postfix, from userid 1000) id 4DED620C1BF; Fri, 24 Sep 2010 19:32:36 +0200 (CEST) X-Spam-ASN: X-Spam-Checker-Version: SpamAssassin 3.2.5 (2008-06-10) on orange.ffwll.ch X-Spam-Level: X-Spam-Hammy: 0.000-+--H*UA:git-send-email, 0.000-+--H*x:git-send-email, 0.000-+--sk:drm_i91 X-Spam-Status: No, score=-4.4 required=6.0 tests=ALL_TRUSTED,BAYES_00 autolearn=ham version=3.2.5 X-Spam-Spammy: 0.961-+--H*r:mail.ffwll.ch, 0.958-+--H*m:ffwll, 0.944-+--H*Ad:U*daniel.vetter Received: from viiv.ffwll.ch (viiv.ffwll.ch [192.168.23.128]) by mail.ffwll.ch (Postfix) with ESMTP id 2BF9420C222; Fri, 24 Sep 2010 19:32:14 +0200 (CEST) Received: from daniel by viiv.ffwll.ch with local (Exim 4.72) (envelope-from ) id 1OzC85-0007bJ-Sh; Fri, 24 Sep 2010 19:32:14 +0200 From: Daniel Vetter To: intel-gfx@lists.freedesktop.org Date: Fri, 24 Sep 2010 19:32:08 +0200 Message-Id: <1285349531-29165-4-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1285349531-29165-1-git-send-email-daniel.vetter@ffwll.ch> References: <1285349531-29165-1-git-send-email-daniel.vetter@ffwll.ch> Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 3/6] drm/i915: unbind unmappable objects on fault/pin X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Fri, 24 Sep 2010 17:33:19 +0000 (UTC) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 5495ac9..ec571b2 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -153,6 +153,20 @@ i915_gem_create_ioctl(struct drm_device *dev, void *data, return 0; } +static bool +i915_gem_object_cpu_accessible(struct drm_gem_object *obj) +{ + struct drm_device *dev = obj->dev; + drm_i915_private_t *dev_priv = dev->dev_private; + struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); + + if (obj_priv->gtt_offset + obj->size > dev_priv->mm.gtt_mappable_end + && obj_priv->gtt_space) + return false; + + return true; +} + static inline int fast_shmem_read(struct page **pages, loff_t page_base, int page_offset, @@ -1172,6 +1186,9 @@ int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf) /* Now bind it into the GTT if needed */ mutex_lock(&dev->struct_mutex); + if (!i915_gem_object_cpu_accessible(obj)) + i915_gem_object_unbind(obj); + if (!obj_priv->gtt_space) { ret = i915_gem_object_bind_to_gtt(obj, 0, true); if (ret) @@ -3197,6 +3214,7 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj, int i, ret; void __iomem *reloc_page; bool need_fence; + bool need_mappable = entry->relocation_count ? true : false; need_fence = entry->flags & EXEC_OBJECT_NEEDS_FENCE && obj_priv->tiling_mode != I915_TILING_NONE; @@ -3211,7 +3229,8 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj, } /* Choose the GTT offset for our buffer and put it there. */ - ret = i915_gem_object_pin(obj, (uint32_t) entry->alignment, false); + ret = i915_gem_object_pin(obj, (uint32_t) entry->alignment, + need_mappable); if (ret) return ret; @@ -4067,7 +4086,8 @@ i915_gem_object_pin(struct drm_gem_object *obj, uint32_t alignment, if (obj_priv->gtt_space != NULL) { if (alignment == 0) alignment = i915_gem_get_gtt_alignment(obj); - if (obj_priv->gtt_offset & (alignment - 1)) { + if (obj_priv->gtt_offset & (alignment - 1) + || (mappable && !i915_gem_object_cpu_accessible(obj))) { WARN(obj_priv->pin_count, "bo is already pinned with incorrect alignment:" " offset=%x, req.alignment=%x\n",