From patchwork Mon Oct 25 01:42:31 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhenyu Wang X-Patchwork-Id: 265992 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id o9P1fs1l017923 for ; Mon, 25 Oct 2010 01:42:20 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 185079EB0C for ; Sun, 24 Oct 2010 18:41:52 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 306669E86C for ; Sun, 24 Oct 2010 18:41:41 -0700 (PDT) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga102.jf.intel.com with ESMTP; 24 Oct 2010 18:41:41 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.58,233,1286175600"; d="scan'208";a="670405530" Received: from snb-beast.sh.intel.com ([10.239.36.40]) by orsmga001.jf.intel.com with ESMTP; 24 Oct 2010 18:41:40 -0700 From: Zhenyu Wang To: intel-gfx@lists.freedesktop.org Date: Mon, 25 Oct 2010 09:42:31 +0800 Message-Id: <1287970951-3677-1-git-send-email-zhenyuw@linux.intel.com> X-Mailer: git-send-email 1.7.1 Cc: stable team Subject: [Intel-gfx] [PATCH] drm/i915: set scan-buffer as uncached on Sandybridge X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Mon, 25 Oct 2010 01:42:20 +0000 (UTC) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 3a98bea..5200ee3 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -34,6 +34,7 @@ #include "intel_bios.h" #include "intel_ringbuffer.h" #include +#include /* General customization: */ diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 9792285..46d724f 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1579,6 +1579,14 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, obj = intel_fb->obj; obj_priv = to_intel_bo(obj); + /* + * Set uncacheable for scan-out buffer on Sandybridge. + * Display engine is non-coherent with LLC, and read from + * main memory only. This ensures data is coherent with display. + */ + if (IS_GEN6(dev)) + obj_priv->agp_type = AGP_USER_UNCACHED_MEMORY; + mutex_lock(&dev->struct_mutex); ret = intel_pin_and_fence_fb_obj(dev, obj); if (ret != 0) {