From patchwork Wed Oct 27 02:17:30 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Xiang, Haihao" X-Patchwork-Id: 284502 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id o9R2LFgE005619 for ; Wed, 27 Oct 2010 02:21:37 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 321389F002 for ; Tue, 26 Oct 2010 19:21:15 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id 8AC5B9E7FF for ; Tue, 26 Oct 2010 19:19:11 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga102.fm.intel.com with ESMTP; 26 Oct 2010 19:19:11 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.58,244,1286175600"; d="scan'208";a="620658577" Received: from xhh-ilk32.sh.intel.com (HELO localhost.localdomain) ([10.239.36.76]) by fmsmga002.fm.intel.com with ESMTP; 26 Oct 2010 19:19:10 -0700 From: "Xiang, Haihao" To: intel-gfx@lists.freedesktop.org Date: Wed, 27 Oct 2010 10:17:30 +0800 Message-Id: <1288145853-25252-4-git-send-email-haihao.xiang@intel.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1288145853-25252-1-git-send-email-haihao.xiang@intel.com> References: <1288145853-25252-1-git-send-email-haihao.xiang@intel.com> Subject: [Intel-gfx] [PATH v2 3/6] Xv: fragments for xv on Sandybridge. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Wed, 27 Oct 2010 02:21:37 +0000 (UTC) diff --git a/configure.ac b/configure.ac index 58fa929..0553df3 100644 --- a/configure.ac +++ b/configure.ac @@ -44,7 +44,7 @@ XORG_DEFAULT_OPTIONS AC_DISABLE_STATIC AC_PROG_LIBTOOL -PKG_CHECK_MODULES(GEN4ASM, [intel-gen4asm >= 1.0], [gen4asm=yes], [gen4asm=no]) +PKG_CHECK_MODULES(GEN4ASM, [intel-gen4asm >= 1.1], [gen4asm=yes], [gen4asm=no]) AM_CONDITIONAL(HAVE_GEN4ASM, test x$gen4asm = xyes) PKG_CHECK_MODULES(UDEV, [libudev], [udev=yes], [udev=no]) diff --git a/src/render_program/Makefile.am b/src/render_program/Makefile.am index c9a0bfc..5229ef5 100644 --- a/src/render_program/Makefile.am +++ b/src/render_program/Makefile.am @@ -61,22 +61,43 @@ INTEL_G4B_GEN5 = \ exa_wm_yuv_rgb.g4b.gen5 \ exa_wm_xy.g4b.gen5 +INTEL_G6A = \ + exa_wm_src_affine.g6a \ + exa_wm_src_sample_argb.g6a \ + exa_wm_src_sample_planar.g6a \ + exa_wm_write.g6a \ + exa_wm_yuv_rgb.g6a + +INTEL_G6B = \ + exa_wm_src_affine.g6b \ + exa_wm_src_sample_argb.g6b \ + exa_wm_src_sample_planar.g6b \ + exa_wm_write.g6b \ + exa_wm_yuv_rgb.g6b + EXTRA_DIST = \ $(INTEL_G4A) \ $(INTEL_G4I) \ $(INTEL_G4B) \ - $(INTEL_G4B_GEN5) + $(INTEL_G4B_GEN5)\ + $(INTEL_G6A) \ + $(INTEL_G6B) if HAVE_GEN4ASM -SUFFIXES = .g4a .g4b +SUFFIXES = .g4a .g4b .g6a .g6b .g4a.g4b: m4 -I$(srcdir) -s $< > $*.g4m && intel-gen4asm -o $@ $*.g4m && intel-gen4asm -g 5 -o $@.gen5 $*.g4m && rm $*.g4m +.g6a.g6b: + m4 -I$(srcdir) -s $< > $*.g6m && intel-gen4asm -g 6 -o $@ $*.g6m && rm $*.g6m + $(INTEL_G4B): $(INTEL_G4I) +$(INTEL_G6B): $(INTEL_G4I) -BUILT_SOURCES= $(INTEL_G4B) +BUILT_SOURCES= $(INTEL_G4B) $(INTEL_G6B) clean-local: -rm -f $(INTEL_G4B) $(INTEL_G4B_GEN5) + -rm -f $(INTEL_G6B) endif diff --git a/src/render_program/exa_wm_src_affine.g6a b/src/render_program/exa_wm_src_affine.g6a new file mode 100644 index 0000000..08195a4 --- /dev/null +++ b/src/render_program/exa_wm_src_affine.g6a @@ -0,0 +1,47 @@ +/* + * Copyright © 2010 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + */ + +/* + * Fragment to compute src u/v values + */ +include(`exa_wm.g4i') + +define(`ul', `src_u') +define(`uh', `m3') +define(`vl', `src_v') +define(`vh', `m5') + +define(`bl', `g2.0<8,8,1>F') +define(`bh', `g4.0<8,8,1>F') + +define(`a0_a_x',`g6.0<0,1,0>F') +define(`a0_a_y',`g6.16<0,1,0>F') + +/* U */ +pln (8) ul<1>F a0_a_x bl { align1 }; /* pixel 0-7 */ +pln (8) uh<1>F a0_a_x bh { align1 }; /* pixel 8-15 */ + +/* V */ +pln (8) vl<1>F a0_a_y bl { align1 }; /* pixel 0-7 */ +pln (8) vh<1>F a0_a_y bh { align1 }; /* pixel 8-15 */ diff --git a/src/render_program/exa_wm_src_affine.g6b b/src/render_program/exa_wm_src_affine.g6b new file mode 100644 index 0000000..7035e6a --- /dev/null +++ b/src/render_program/exa_wm_src_affine.g6b @@ -0,0 +1,4 @@ + { 0x0060005a, 0x204077be, 0x000000c0, 0x008d0040 }, + { 0x0060005a, 0x206077be, 0x000000c0, 0x008d0080 }, + { 0x0060005a, 0x208077be, 0x000000d0, 0x008d0040 }, + { 0x0060005a, 0x20a077be, 0x000000d0, 0x008d0080 }, diff --git a/src/render_program/exa_wm_src_sample_argb.g6a b/src/render_program/exa_wm_src_sample_argb.g6a new file mode 120000 index 0000000..2684089 --- /dev/null +++ b/src/render_program/exa_wm_src_sample_argb.g6a @@ -0,0 +1 @@ +exa_wm_src_sample_argb.g4a \ No newline at end of file diff --git a/src/render_program/exa_wm_src_sample_argb.g6b b/src/render_program/exa_wm_src_sample_argb.g6b new file mode 100644 index 0000000..8bfe849 --- /dev/null +++ b/src/render_program/exa_wm_src_sample_argb.g6b @@ -0,0 +1,3 @@ + { 0x00000201, 0x20080061, 0x00000000, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 }, + { 0x02800031, 0x21c01cc9, 0x00000020, 0x0a8a0001 }, diff --git a/src/render_program/exa_wm_src_sample_planar.g6a b/src/render_program/exa_wm_src_sample_planar.g6a new file mode 120000 index 0000000..d4e34a1 --- /dev/null +++ b/src/render_program/exa_wm_src_sample_planar.g6a @@ -0,0 +1 @@ +exa_wm_src_sample_planar.g4a \ No newline at end of file diff --git a/src/render_program/exa_wm_src_sample_planar.g6b b/src/render_program/exa_wm_src_sample_planar.g6b new file mode 100644 index 0000000..0a22827 --- /dev/null +++ b/src/render_program/exa_wm_src_sample_planar.g6b @@ -0,0 +1,5 @@ + { 0x00000201, 0x20080061, 0x00000000, 0x0000e000 }, + { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 }, + { 0x02800031, 0x22001cc9, 0x00000020, 0x0a2a0001 }, + { 0x02800031, 0x21c01cc9, 0x00000020, 0x0a2a0003 }, + { 0x02800031, 0x22401cc9, 0x00000020, 0x0a2a0005 }, diff --git a/src/render_program/exa_wm_write.g6a b/src/render_program/exa_wm_write.g6a new file mode 100644 index 0000000..27f91b5 --- /dev/null +++ b/src/render_program/exa_wm_write.g6a @@ -0,0 +1,79 @@ +/* + * Copyright © 2010 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + */ + +include(`exa_wm.g4i') + +/* + * Prepare data in m2-m3 for Red channel, m4-m5 for Green channel, + * m6-m7 for Blue and m8-m9 for Alpha channel + */ +define(`slot_r_00', `m2') +define(`slot_r_01', `m3') +define(`slot_g_00', `m4') +define(`slot_g_01', `m5') +define(`slot_b_00', `m6') +define(`slot_b_01', `m7') +define(`slot_a_00', `m8') +define(`slot_a_01', `m9') + +mov (8) slot_r_00<1>F src_sample_r_01<8,8,1>F { align1 }; +mov (8) slot_r_01<1>F src_sample_r_23<8,8,1>F { align1 }; + +mov (8) slot_g_00<1>F src_sample_g_01<8,8,1>F { align1 }; +mov (8) slot_g_01<1>F src_sample_g_23<8,8,1>F { align1 }; + +mov (8) slot_b_00<1>F src_sample_b_01<8,8,1>F { align1 }; +mov (8) slot_b_01<1>F src_sample_b_23<8,8,1>F { align1 }; + +mov (8) slot_a_00<1>F src_sample_a_01<8,8,1>F { align1 }; +mov (8) slot_a_01<1>F src_sample_a_23<8,8,1>F { align1 }; + +/* pass payload in m0-m1 */ +mov (8) data_port_msg_0<1>UD g0<8,8,1>UD { align1 }; +mov (8) data_port_msg_1<1>UD g1<8,8,1>UD { align1 }; + +/* write */ +send (16) + data_port_msg_0_ind + acc0<1>UW + null + write ( + 0, /* binding_table */ + 16, /* pixel scordboard clear, msg type simd16 single source */ + 12, /* render target write */ + 0 /* no write commit message */ + ) + mlen 10 + rlen 0 + { align1 EOT }; + +nop; +nop; +nop; +nop; +nop; +nop; +nop; +nop; + diff --git a/src/render_program/exa_wm_write.g6b b/src/render_program/exa_wm_write.g6b new file mode 100644 index 0000000..9db2129 --- /dev/null +++ b/src/render_program/exa_wm_write.g6b @@ -0,0 +1,19 @@ + { 0x00600001, 0x204003be, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x206003be, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x208003be, 0x008d0200, 0x00000000 }, + { 0x00600001, 0x20a003be, 0x008d0220, 0x00000000 }, + { 0x00600001, 0x20c003be, 0x008d0240, 0x00000000 }, + { 0x00600001, 0x20e003be, 0x008d0260, 0x00000000 }, + { 0x00600001, 0x210003be, 0x008d0280, 0x00000000 }, + { 0x00600001, 0x212003be, 0x008d02a0, 0x00000000 }, + { 0x00600001, 0x20000022, 0x008d0000, 0x00000000 }, + { 0x00600001, 0x20200022, 0x008d0020, 0x00000000 }, + { 0x05800031, 0x24001cc8, 0x00000000, 0x94099000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, diff --git a/src/render_program/exa_wm_yuv_rgb.g6a b/src/render_program/exa_wm_yuv_rgb.g6a new file mode 120000 index 0000000..d34d246 --- /dev/null +++ b/src/render_program/exa_wm_yuv_rgb.g6a @@ -0,0 +1 @@ +exa_wm_yuv_rgb.g4a \ No newline at end of file diff --git a/src/render_program/exa_wm_yuv_rgb.g6b b/src/render_program/exa_wm_yuv_rgb.g6b new file mode 100644 index 0000000..01ec5e5 --- /dev/null +++ b/src/render_program/exa_wm_yuv_rgb.g6b @@ -0,0 +1,12 @@ + { 0x00800040, 0x23007fbd, 0x008d0200, 0xbd808081 }, + { 0x00800041, 0x23007fbd, 0x008d0300, 0x3f94fdf4 }, + { 0x00800040, 0x22c07fbd, 0x008d01c0, 0xbf008084 }, + { 0x00800040, 0x23407fbd, 0x008d0240, 0xbf008084 }, + { 0x00800001, 0x240003bc, 0x008d0300, 0x00000000 }, + { 0x80800048, 0x21c07fbd, 0x008d02c0, 0x3fcc49ba }, + { 0x00800001, 0x240003bc, 0x008d0300, 0x00000000 }, + { 0x00800048, 0x24007fbc, 0x008d02c0, 0xbf5020c5 }, + { 0x80800048, 0x22007fbd, 0x008d0340, 0xbec8b439 }, + { 0x00800001, 0x240003bc, 0x008d0300, 0x00000000 }, + { 0x80800048, 0x22407fbd, 0x008d0340, 0x40011687 }, + { 0x00800001, 0x228003fd, 0x00000000, 0x3f800000 },