From patchwork Wed Feb 2 20:28:03 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jesse Barnes X-Patchwork-Id: 527391 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p12KSg6J018781 for ; Wed, 2 Feb 2011 20:29:19 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 914AF9E985 for ; Wed, 2 Feb 2011 12:28:41 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from oproxy3-pub.bluehost.com (oproxy3-pub.bluehost.com [69.89.21.8]) by gabe.freedesktop.org (Postfix) with SMTP id BD3219E960 for ; Wed, 2 Feb 2011 12:28:16 -0800 (PST) Received: (qmail 31952 invoked by uid 0); 2 Feb 2011 20:28:15 -0000 Received: from unknown (HELO box514.bluehost.com) (74.220.219.114) by oproxy3.bluehost.com with SMTP; 2 Feb 2011 20:28:15 -0000 DomainKey-Signature: a=rsa-sha1; q=dns; c=nofws; s=default; d=virtuousgeek.org; h=Received:From:To:Cc:Subject:Date:Message-Id:X-Mailer:In-Reply-To:References:X-Identified-User; b=U3VuFeXeHtVKgeEbQnrl5VMEC3XR5R1EoqxXF1oY9vJfMXyNcPg0lABD5PXHTOWVTvWZiarZMznxVsI6Fz6q6zxMR7nU4TSAUYuk9an3NbL8LSOhqmQ+nCVCYkT0pBQH; Received: from c-67-174-193-198.hsd1.ca.comcast.net ([67.174.193.198] helo=localhost6.localdomain6) by box514.bluehost.com with esmtpsa (TLSv1:AES256-SHA:256) (Exim 4.69) (envelope-from ) id 1PkjJA-0005Rw-92; Wed, 02 Feb 2011 13:28:08 -0700 From: Jesse Barnes To: intel-gfx@lists.freedesktop.org Date: Wed, 2 Feb 2011 12:28:03 -0800 Message-Id: <1296678483-1283-2-git-send-email-jbarnes@virtuousgeek.org> X-Mailer: git-send-email 1.7.2.3 In-Reply-To: <1296678483-1283-1-git-send-email-jbarnes@virtuousgeek.org> References: <1296678483-1283-1-git-send-email-jbarnes@virtuousgeek.org> X-Identified-User: {10642:box514.bluehost.com:virtuous:virtuousgeek.org} {sentby:smtp auth 67.174.193.198 authed with jbarnes@virtuousgeek.org} Subject: [Intel-gfx] [PATCH 2/2] drm/i915: add port assertion check when disabling transcoders X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Wed, 02 Feb 2011 20:29:19 +0000 (UTC) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index f5bc637..bfc037c 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1265,6 +1265,62 @@ static void assert_transcoder_disabled(struct drm_i915_private *dev_priv, WARN(enabled, "transcoder assertion failed, should be off on pipe %c but is still active\n", pipe ? 'B' :'A'); } +static void assert_pch_dp_disabled(struct drm_i915_private *dev_priv, + enum pipe pipe, int reg) +{ + u32 val; + u32 sel_pipe; + + val = I915_READ(reg); + sel_pipe = (val & DP_PIPEB_SELECT) >> 30; + WARN((val & DP_PORT_EN) && sel_pipe == pipe, + "PCH DP (0x%08x) enabled on transcoder %c, should be disabled\n", + reg, pipe ? 'B' : 'A'); +} + +static void assert_pch_hdmi_disabled(struct drm_i915_private *dev_priv, + enum pipe pipe, int reg) +{ + u32 val; + u32 sel_pipe; + + val = I915_READ(reg); + sel_pipe = (val & TRANSCODER_B) >> 30; + WARN((val & PORT_ENABLE) && sel_pipe == pipe, + "PCH DP (0x%08x) enabled on transcoder %c, should be disabled\n", + reg, pipe ? 'B' : 'A'); +} + +static void assert_pch_ports_disabled(struct drm_i915_private *dev_priv, + enum pipe pipe) +{ + int reg; + u32 val; + u32 sel_pipe; + + assert_pch_dp_disabled(dev_priv, pipe, PCH_DP_B); + assert_pch_dp_disabled(dev_priv, pipe, PCH_DP_C); + assert_pch_dp_disabled(dev_priv, pipe, PCH_DP_D); + + reg = PCH_ADPA; + val = I915_READ(reg); + sel_pipe = (val & ADPA_TRANS_B_SELECT) >> 30; + WARN(sel_pipe == pipe && (val & ADPA_DAC_ENABLE), + "PCH VGA enabled on transcoder %c, should be disabled\n", + pipe ? 'B' : 'A'); + + reg = PCH_LVDS; + val = I915_READ(reg); + sel_pipe = (val & LVDS_PIPEB_SELECT) >> 30; + WARN(sel_pipe == pipe && (val & LVDS_PORT_EN), + "PCH LVDS enabled on transcoder %c, should be disabled\n", + pipe ? 'B' : 'A'); + + assert_pch_hdmi_disabled(dev_priv, pipe, HDMIB); + assert_pch_hdmi_disabled(dev_priv, pipe, HDMIC); + assert_pch_hdmi_disabled(dev_priv, pipe, HDMID); +} + /** * intel_enable_pll - enable a PLL * @dev_priv: i915 private structure @@ -1419,6 +1475,9 @@ static void intel_disable_transcoder(struct drm_i915_private *dev_priv, assert_fdi_tx_disabled(dev_priv, pipe); assert_fdi_rx_disabled(dev_priv, pipe); + /* Ports must be off as well */ + assert_pch_ports_disabled(dev_priv, pipe); + reg = TRANSCONF(pipe); val = I915_READ(reg); val &= ~TRANS_ENABLE;