From patchwork Fri Mar 18 03:18:21 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yuanhan Liu X-Patchwork-Id: 642751 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p2I3Iqg2020287 for ; Fri, 18 Mar 2011 03:19:20 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E537B9EBBF for ; Thu, 17 Mar 2011 20:18:51 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 1919D9E765 for ; Thu, 17 Mar 2011 20:18:33 -0700 (PDT) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga101.fm.intel.com with ESMTP; 17 Mar 2011 20:18:32 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.63,203,1299484800"; d="scan'208";a="898515063" Received: from yliu-dev.sh.intel.com ([10.239.36.113]) by fmsmga001.fm.intel.com with ESMTP; 17 Mar 2011 20:18:32 -0700 From: Yuanhan Liu To: intel-gfx@lists.freedesktop.org Date: Fri, 18 Mar 2011 11:18:21 +0800 Message-Id: <1300418301-26092-1-git-send-email-yuanhan.liu@linux.intel.com> X-Mailer: git-send-email 1.7.4 Subject: [Intel-gfx] [PATCH] Fix compute error while enable self-refresh X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Fri, 18 Mar 2011 03:19:20 +0000 (UTC) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 3106c0d..dc52dc1 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3885,7 +3885,7 @@ static bool g4x_compute_srwm(struct drm_device *dev, static inline bool single_plane_enabled(unsigned int mask) { - return mask && (mask & -mask) == 0; + return mask && (mask & (mask - 1)) == 0; } static void g4x_update_wm(struct drm_device *dev) @@ -3910,7 +3910,7 @@ static void g4x_update_wm(struct drm_device *dev) plane_sr = cursor_sr = 0; if (single_plane_enabled(enabled) && - g4x_compute_srwm(dev, ffs(enabled) - 1, + g4x_compute_srwm(dev, fls(enabled) - 1, sr_latency_ns, &g4x_wm_info, &g4x_cursor_wm_info, @@ -4335,7 +4335,7 @@ static void ironlake_update_wm(struct drm_device *dev) if (!single_plane_enabled(enabled)) return; - enabled = ffs(enabled) - 1; + enabled = fls(enabled) - 1; /* WM1 */ if (!ironlake_compute_srwm(dev, 1, enabled, @@ -4421,7 +4421,7 @@ static void sandybridge_update_wm(struct drm_device *dev) if (!single_plane_enabled(enabled)) return; - enabled = ffs(enabled) - 1; + enabled = fls(enabled) - 1; /* WM1 */ if (!ironlake_compute_srwm(dev, 1, enabled,