@@ -2456,6 +2456,8 @@ i915_gem_object_flush_fence(struct drm_i915_gem_object *obj,
return ret;
}
+ /* Invalidate the GPU TLBs for any future reads */
+ obj->base.read_domains &= ~I915_GEM_GPU_DOMAINS;
obj->fenced_gpu_access = false;
}
@@ -172,9 +172,8 @@ i915_gem_object_set_to_gpu_domain(struct drm_i915_gem_object *obj,
* write domain
*/
if (obj->base.write_domain &&
- (((obj->base.write_domain != obj->base.pending_read_domains ||
- obj->ring != ring)) ||
- (obj->fenced_gpu_access && !obj->pending_fenced_gpu_access))) {
+ (obj->base.write_domain != obj->base.pending_read_domains ||
+ obj->ring != ring)) {
flush_domains |= obj->base.write_domain;
invalidate_domains |=
obj->base.pending_read_domains & ~obj->base.write_domain;