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[7/8] drm/i915: move sandybridge RC6 enable in resume after ring initialization

Message ID 1300699639-23996-8-git-send-email-zhenyuw@linux.intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Zhenyu Wang March 21, 2011, 9:27 a.m. UTC
None
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index a55b71d..b40f3ee 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -384,6 +384,10 @@  static int i915_drm_thaw(struct drm_device *dev)
 
 		if (IS_IRONLAKE_M(dev))
 			ironlake_enable_rc6(dev);
+
+		if (IS_GEN6(dev))
+			gen6_enable_rps(dev_priv);
+
 	}
 
 	intel_opregion_init(dev);
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index 26387c3..8e6aa8c 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -862,9 +862,6 @@  int i915_restore_state(struct drm_device *dev)
 		intel_init_emon(dev);
 	}
 
-	if (IS_GEN6(dev))
-		gen6_enable_rps(dev_priv);
-
 	/* Memory arbitration state */
 	if (IS_GEN3(dev))
 		I915_WRITE (MI_ARB_STATE, dev_priv->saveMI_ARB_STATE | 0xffff0000);