[8/8] drm/i915: only save/restore VGA clock regs for non-KMS case

Commit Message

Zhenyu Wang March 21, 2011, 9:27 a.m. UTC

None

Patch

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index eaee7f1..c5dc79c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1276,6 +1276,7 @@  extern void ironlake_enable_rc6(struct drm_device *dev);
 extern void gen6_set_rps(struct drm_device *dev, u8 val);
 extern void intel_detect_pch (struct drm_device *dev);
 extern int intel_trans_dp_port_sel (struct drm_crtc *crtc);
+extern void i915_disable_vga(struct drm_device *dev);
 
 /* overlay */
 #ifdef CONFIG_DEBUG_FS
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index 8e6aa8c..07f4fc9 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -680,13 +680,15 @@  void i915_save_display(struct drm_device *dev)
 	}
 
 	/* VGA state */
-	dev_priv->saveVGA0 = I915_READ(VGA0);
-	dev_priv->saveVGA1 = I915_READ(VGA1);
-	dev_priv->saveVGA_PD = I915_READ(VGA_PD);
-	if (HAS_PCH_SPLIT(dev))
-		dev_priv->saveVGACNTRL = I915_READ(CPU_VGACNTRL);
-	else
-		dev_priv->saveVGACNTRL = I915_READ(VGACNTRL);
+	if (!drm_core_check_feature(dev, DRIVER_MODESET)) {
+		dev_priv->saveVGA0 = I915_READ(VGA0);
+		dev_priv->saveVGA1 = I915_READ(VGA1);
+		dev_priv->saveVGA_PD = I915_READ(VGA_PD);
+		if (HAS_PCH_SPLIT(dev))
+			dev_priv->saveVGACNTRL = I915_READ(CPU_VGACNTRL);
+		else
+			dev_priv->saveVGACNTRL = I915_READ(VGACNTRL);
+	}
 
 	i915_save_vga(dev);
 }
@@ -779,17 +781,22 @@  void i915_restore_display(struct drm_device *dev)
 		}
 	}
 	/* VGA state */
-	if (HAS_PCH_SPLIT(dev))
-		I915_WRITE(CPU_VGACNTRL, dev_priv->saveVGACNTRL);
-	else
-		I915_WRITE(VGACNTRL, dev_priv->saveVGACNTRL);
-	I915_WRITE(VGA0, dev_priv->saveVGA0);
-	I915_WRITE(VGA1, dev_priv->saveVGA1);
-	I915_WRITE(VGA_PD, dev_priv->saveVGA_PD);
-	POSTING_READ(VGA_PD);
-	udelay(150);
+	if (!drm_core_check_feature(dev, DRIVER_MODESET)) {
+		if (HAS_PCH_SPLIT(dev))
+			I915_WRITE(CPU_VGACNTRL, dev_priv->saveVGACNTRL);
+		else
+			I915_WRITE(VGACNTRL, dev_priv->saveVGACNTRL);
+		I915_WRITE(VGA0, dev_priv->saveVGA0);
+		I915_WRITE(VGA1, dev_priv->saveVGA1);
+		I915_WRITE(VGA_PD, dev_priv->saveVGA_PD);
+		POSTING_READ(VGA_PD);
+		udelay(150);
+	}
 
 	i915_restore_vga(dev);
+
+	if (drm_core_check_feature(dev, DRIVER_MODESET))
+		i915_disable_vga(dev);
 }
 
 int i915_save_state(struct drm_device *dev)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 13b17e0..13d45b8 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6815,7 +6815,7 @@  static void intel_init_quirks(struct drm_device *dev)
 }
 
 /* Disable the VGA plane that we never use */
-static void i915_disable_vga(struct drm_device *dev)
+void i915_disable_vga(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	u8 sr1;