drm/i915: fix relaxed tiling on gen2

Commit Message

Daniel Vetter March 26, 2011, 2:22 p.m. UTC

None

Patch

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 4554b2f..bc96e70 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1452,8 +1452,9 @@  i915_gem_get_unfenced_gtt_alignment(struct drm_i915_gem_object *obj)
 	 * edge of an even tile row (where tile rows are counted as if the bo is
 	 * placed in a fenced gtt region).
 	 */
-	if (IS_GEN2(dev) ||
-	    (obj->tiling_mode == I915_TILING_Y && HAS_128_BYTE_Y_TILING(dev)))
+	if (IS_GEN2(dev))
+		tile_height = 16;
+	else if (obj->tiling_mode == I915_TILING_Y && HAS_128_BYTE_Y_TILING(dev))
 		tile_height = 32;
 	else
 		tile_height = 8;
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index 281ad3d..693e6e8 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -190,6 +190,9 @@  i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode)
 	if (tiling_mode == I915_TILING_NONE)
 		return true;
 
+	if (IS_GEN2(dev) && tiling_mode == I915_TILING_Y)
+		return false;
+
 	if (IS_GEN2(dev) ||
 	    (tiling_mode == I915_TILING_Y && HAS_128_BYTE_Y_TILING(dev)))
 		tile_width = 128;
@@ -226,6 +229,12 @@  i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode)
 	if (stride < tile_width)
 		return false;
 
+	if (IS_GEN2(dev) && (size / tile_width) % 16 != 0) {
+		printk_once("broken userspace detected, "
+			    "please upgrade libdrm and xf86-video-intel\n");
+		return false;
+	}
+
 	if (stride & (stride - 1))
 		return false;