diff mbox

drm/i915: disable RC6+ on Sandy Bridge

Message ID 1302106030-10268-1-git-send-email-jbarnes@virtuousgeek.org (mailing list archive)
State New, archived
Headers show

Commit Message

Jesse Barnes April 6, 2011, 4:07 p.m. UTC
RC6+ can cause trouble, so keep it disabled (this costs us a little
power, around 20mW I think, but better safe than sorry).

Cc: stable@kernel.org
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
 drivers/gpu/drm/i915/intel_display.c |    1 -
 1 files changed, 0 insertions(+), 1 deletions(-)

Comments

Chris Wilson April 6, 2011, 6:46 p.m. UTC | #1
On Wed,  6 Apr 2011 09:07:10 -0700, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> RC6+ can cause trouble, so keep it disabled (this costs us a little
> power, around 20mW I think, but better safe than sorry).

Any clues as to the failure mode?
-Chris
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 432fc04..b265bd3 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6874,7 +6874,6 @@  void gen6_enable_rps(struct drm_i915_private *dev_priv)
 	I915_WRITE(GEN6_RC6pp_THRESHOLD, 64000); /* unused */
 
 	I915_WRITE(GEN6_RC_CONTROL,
-		   GEN6_RC_CTL_RC6p_ENABLE |
 		   GEN6_RC_CTL_RC6_ENABLE |
 		   GEN6_RC_CTL_EI_MODE(1) |
 		   GEN6_RC_CTL_HW_ENABLE);