From patchwork Wed Apr 20 23:53:17 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Widawsky X-Patchwork-Id: 723571 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p3KNsDHC031142 for ; Wed, 20 Apr 2011 23:54:33 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2B6E99EF60 for ; Wed, 20 Apr 2011 16:54:13 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from cloud01.chad-versace.us (184-106-247-128.static.cloud-ips.com [184.106.247.128]) by gabe.freedesktop.org (Postfix) with ESMTP id 6EB659E7FD for ; Wed, 20 Apr 2011 16:53:27 -0700 (PDT) Received: from localhost.localdomain (jfdmzpr04-ext.jf.intel.com [134.134.137.73]) by cloud01.chad-versace.us (Postfix) with ESMTPSA id 828111D4267; Wed, 20 Apr 2011 23:54:30 +0000 (UTC) From: Ben Widawsky To: intel-gfx@lists.freedesktop.org Date: Wed, 20 Apr 2011 16:53:17 -0700 Message-Id: <1303343599-18509-4-git-send-email-ben@bwidawsk.net> X-Mailer: git-send-email 1.7.3.4 In-Reply-To: <1303343599-18509-1-git-send-email-ben@bwidawsk.net> References: <1303343599-18509-1-git-send-email-ben@bwidawsk.net> Subject: [Intel-gfx] [PATCH 3/5] drm/i915: forcewake struct mutex locking fixes X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Wed, 20 Apr 2011 23:54:33 +0000 (UTC) Signed-off-by: Ben Widawsky --- drivers/gpu/drm/i915/i915_debugfs.c | 2 ++ drivers/gpu/drm/i915/intel_display.c | 12 ++++++++++++ 2 files changed, 14 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 3cb0722..94b38f3 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -873,6 +873,7 @@ static int i915_cur_delayinfo(struct seq_file *m, void *unused) int max_freq; /* RPSTAT1 is in the GT power well */ + mutex_lock(&dev->struct_mutex); gen6_gt_force_wake_get(dev_priv); rpstat = I915_READ(GEN6_RPSTAT1); @@ -919,6 +920,7 @@ static int i915_cur_delayinfo(struct seq_file *m, void *unused) max_freq * 50); gen6_gt_force_wake_put(dev_priv); + mutex_unlock(&dev->struct_mutex); } else { seq_printf(m, "no P-state info available\n"); } diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index f6780cf..51dcb3f 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2873,7 +2873,11 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) ironlake_pch_enable(crtc); intel_crtc_load_lut(crtc); + + mutex_lock(&dev->struct_mutex); intel_update_fbc(dev); + mutex_unlock(&dev->struct_mutex); + intel_crtc_update_cursor(crtc, true); } @@ -2969,8 +2973,11 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc) intel_crtc->active = false; intel_update_watermarks(dev); + + mutex_lock(&dev->struct_mutex); intel_update_fbc(dev); intel_clear_scanline_wait(dev); + mutex_unlock(&dev->struct_mutex); } static void ironlake_crtc_dpms(struct drm_crtc *crtc, int mode) @@ -3067,9 +3074,12 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc) intel_disable_pll(dev_priv, pipe); intel_crtc->active = false; + + mutex_lock(&dev->struct_mutex); intel_update_fbc(dev); intel_update_watermarks(dev); intel_clear_scanline_wait(dev); + mutex_unlock(&dev->struct_mutex); } static void i9xx_crtc_dpms(struct drm_crtc *crtc, int mode) @@ -6860,6 +6870,7 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv) * userspace... */ I915_WRITE(GEN6_RC_STATE, 0); + mutex_lock(&dev_priv->dev->struct_mutex); gen6_gt_force_wake_get(dev_priv); /* disable the counters and set deterministic thresholds */ @@ -6959,6 +6970,7 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv) I915_WRITE(GEN6_PMINTRMSK, 0); gen6_gt_force_wake_put(dev_priv); + mutex_unlock(&dev_priv->dev->struct_mutex); } void intel_enable_clock_gating(struct drm_device *dev)