From patchwork Wed Apr 27 20:46:05 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 737611 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p3RKdPcV011664 for ; Wed, 27 Apr 2011 20:39:45 GMT Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 423629F044 for ; Wed, 27 Apr 2011 13:39:25 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-ww0-f41.google.com (mail-ww0-f41.google.com [74.125.82.41]) by gabe.freedesktop.org (Postfix) with ESMTP id 8AF029E925 for ; Wed, 27 Apr 2011 13:38:13 -0700 (PDT) Received: by wwi18 with SMTP id 18so3706954wwi.0 for ; Wed, 27 Apr 2011 13:38:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=domainkey-signature:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references; bh=ZLjQImwNmTVs3eI39yohgS0LVwPyq67ha/k3Qa6WdC4=; b=JX0qf/pCk5LK/JRoIpSAM6o2Y9Lo1WAr1ee2W8uC0Oj8zlx0Y+5myAXxT90EbJ/e8Q gA8jj8i4BKAvJzZb60J4zmUqSO2cGRoCIjuaR6qGhz/zzIkYL5mfOe28I6ImznWfDCL5 ko6XnxziFlmhdYR/dDL0mySE1HiEo+H80H5Wg= DomainKey-Signature: a=rsa-sha1; c=nofws; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=D65JrIpsUMAeMvof+8smfK1tzaG9pb6ZeM8qEoNUVh1lCeA3c5zcwLvVv9fNr/Ejrw Q57ditmMaBGSl/zJ6fXROJFYgxcBDrMNDCisXSWd9MAScbdTHeV38gfs6oCpuJz3X2tc ivM31MqvV/sb9ZMV7kCDFJcoJuVb42rZzJ110= Received: by 10.216.159.75 with SMTP id r53mr2474583wek.98.1303936692471; Wed, 27 Apr 2011 13:38:12 -0700 (PDT) Received: from localhost.localdomain (cable-static-216-166.intergga.ch [87.102.216.166]) by mx.google.com with ESMTPS id l5sm553743wej.32.2011.04.27.13.38.11 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 27 Apr 2011 13:38:11 -0700 (PDT) From: Daniel Vetter To: intel-gfx@lists.freedesktop.org Date: Wed, 27 Apr 2011 22:46:05 +0200 Message-Id: <1303937166-1756-3-git-send-email-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 1.7.4.2 In-Reply-To: <1303937166-1756-1-git-send-email-daniel.vetter@ffwll.ch> References: <1303937166-1756-1-git-send-email-daniel.vetter@ffwll.ch> Cc: Daniel Vetter Subject: [Intel-gfx] [PATCH 2/3] drm/i915/ringbuffer: kill pipe_control->gtt_offset X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.11 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Wed, 27 Apr 2011 20:39:59 +0000 (UTC) With the snb blt workaround gone, gen5 pipe_control is the only user of ring->private. It's already tiny, but make it even smaller to prepare for embedding. The added indirection will be killed in the next patch. Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_ringbuffer.c | 8 +++----- 1 files changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index afb2a34..c73410f 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -213,7 +213,6 @@ static int init_ring_common(struct intel_ring_buffer *ring) struct pipe_control { struct drm_i915_gem_object *obj; volatile u32 *cpu_page; - u32 gtt_offset; }; static int @@ -243,7 +242,6 @@ init_pipe_control(struct intel_ring_buffer *ring) if (ret) goto err_unref; - pc->gtt_offset = obj->gtt_offset; pc->cpu_page = kmap(obj->pages[0]); if (pc->cpu_page == NULL) goto err_unpin; @@ -400,7 +398,7 @@ pc_render_add_request(struct intel_ring_buffer *ring, struct drm_device *dev = ring->dev; u32 seqno = i915_gem_get_seqno(dev); struct pipe_control *pc = ring->private; - u32 scratch_addr = pc->gtt_offset + 128; + u32 scratch_addr = pc->obj->gtt_offset + 128; int ret; /* For Ironlake, MI_USER_INTERRUPT was deprecated and apparently @@ -417,7 +415,7 @@ pc_render_add_request(struct intel_ring_buffer *ring, intel_ring_emit(ring, GFX_OP_PIPE_CONTROL | PIPE_CONTROL_QW_WRITE | PIPE_CONTROL_WC_FLUSH | PIPE_CONTROL_TC_FLUSH); - intel_ring_emit(ring, pc->gtt_offset | PIPE_CONTROL_GLOBAL_GTT); + intel_ring_emit(ring, pc->obj->gtt_offset | PIPE_CONTROL_GLOBAL_GTT); intel_ring_emit(ring, seqno); intel_ring_emit(ring, 0); PIPE_CONTROL_FLUSH(ring, scratch_addr); @@ -434,7 +432,7 @@ pc_render_add_request(struct intel_ring_buffer *ring, intel_ring_emit(ring, GFX_OP_PIPE_CONTROL | PIPE_CONTROL_QW_WRITE | PIPE_CONTROL_WC_FLUSH | PIPE_CONTROL_TC_FLUSH | PIPE_CONTROL_NOTIFY); - intel_ring_emit(ring, pc->gtt_offset | PIPE_CONTROL_GLOBAL_GTT); + intel_ring_emit(ring, pc->obj->gtt_offset | PIPE_CONTROL_GLOBAL_GTT); intel_ring_emit(ring, seqno); intel_ring_emit(ring, 0); intel_ring_advance(ring);